diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-24 23:26:25 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-24 23:26:25 -0400 |
commit | 0de085bb474f64e4fdb2f1ff3268590792648c7b (patch) | |
tree | 67c88c8215b85e01430531dba7d7c8ad73173b67 /arch/powerpc/kernel/pci_32.c | |
parent | 3836df6b520a2f93033bf53200b12a2cb5137395 (diff) | |
parent | e58712111fe6eb7573fd6dd12d80de3bec13f277 (diff) |
Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
* 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc: (25 commits)
[POWERPC] 85xx: Added needed MPC85xx PCI device IDs
[POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs
[POWERPC] 85xxCDS: MPC8548 DTS cleanup.
[POWERPC] 85xxCDS: Misc 8548 PCI Corrections.
[POWERPC] 85xxCDS: Delay 8259 cascade hookup.
[POWERPC] 85xxCDS: Make sure restart resets the PCI bus.
[POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.
[POWERPC] FSL: Add support for PCI-X controllers
[POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB
[POWERPC] Provide ability to setup P2P bridge registers from struct resource
[POWERPC] Add basic PCI/PCI Express support for 8544DS board
[POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
[POWERPC] Removed setup_indirect_pci_nomap
[POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS
[POWERPC] 85xx: Added 8568 PCIe support
[POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected
[POWERPC] Add basic PCI node for mpc8568mds board
[POWERPC] Use Freescale pci/pcie common code for 85xx boards
[POWERPC] Update PCI nodes in the 83xx/85xx boards device tree
[POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node
...
Diffstat (limited to 'arch/powerpc/kernel/pci_32.c')
-rw-r--r-- | arch/powerpc/kernel/pci_32.c | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index 0adf077f3f3a..721a69400d65 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -415,15 +415,13 @@ probe_resource(struct pci_bus *parent, struct resource *pr, | |||
415 | return 0; | 415 | return 0; |
416 | } | 416 | } |
417 | 417 | ||
418 | static void __init | 418 | void __init |
419 | update_bridge_base(struct pci_bus *bus, int i) | 419 | update_bridge_resource(struct pci_dev *dev, struct resource *res) |
420 | { | 420 | { |
421 | struct resource *res = bus->resource[i]; | ||
422 | u8 io_base_lo, io_limit_lo; | 421 | u8 io_base_lo, io_limit_lo; |
423 | u16 mem_base, mem_limit; | 422 | u16 mem_base, mem_limit; |
424 | u16 cmd; | 423 | u16 cmd; |
425 | unsigned long start, end, off; | 424 | unsigned long start, end, off; |
426 | struct pci_dev *dev = bus->self; | ||
427 | struct pci_controller *hose = dev->sysdata; | 425 | struct pci_controller *hose = dev->sysdata; |
428 | 426 | ||
429 | if (!hose) { | 427 | if (!hose) { |
@@ -467,12 +465,20 @@ update_bridge_base(struct pci_bus *bus, int i) | |||
467 | pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit); | 465 | pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit); |
468 | 466 | ||
469 | } else { | 467 | } else { |
470 | DBG(KERN_ERR "PCI: ugh, bridge %s res %d has flags=%lx\n", | 468 | DBG(KERN_ERR "PCI: ugh, bridge %s res has flags=%lx\n", |
471 | pci_name(dev), i, res->flags); | 469 | pci_name(dev), res->flags); |
472 | } | 470 | } |
473 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 471 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
474 | } | 472 | } |
475 | 473 | ||
474 | static void __init | ||
475 | update_bridge_base(struct pci_bus *bus, int i) | ||
476 | { | ||
477 | struct resource *res = bus->resource[i]; | ||
478 | struct pci_dev *dev = bus->self; | ||
479 | update_bridge_resource(dev, res); | ||
480 | } | ||
481 | |||
476 | static inline void alloc_resource(struct pci_dev *dev, int idx) | 482 | static inline void alloc_resource(struct pci_dev *dev, int idx) |
477 | { | 483 | { |
478 | struct resource *pr, *r = &dev->resource[idx]; | 484 | struct resource *pr, *r = &dev->resource[idx]; |
@@ -1468,3 +1474,10 @@ EARLY_PCI_OP(read, dword, u32 *) | |||
1468 | EARLY_PCI_OP(write, byte, u8) | 1474 | EARLY_PCI_OP(write, byte, u8) |
1469 | EARLY_PCI_OP(write, word, u16) | 1475 | EARLY_PCI_OP(write, word, u16) |
1470 | EARLY_PCI_OP(write, dword, u32) | 1476 | EARLY_PCI_OP(write, dword, u32) |
1477 | |||
1478 | extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); | ||
1479 | int early_find_capability(struct pci_controller *hose, int bus, int devfn, | ||
1480 | int cap) | ||
1481 | { | ||
1482 | return pci_bus_find_capability(fake_pci_bus(hose, bus), devfn, cap); | ||
1483 | } | ||