powerpc/fsl-pci: Don't hide resource for pci/e when configured as Agent/EP

Current pci/pcie init code will hide the pci/pcie host resource.
But did not judge it is host/RC or agent/EP. If configured as
agent/EP, we should avoid hiding its resource in the host side.

In PCI system, the Programing Interface can be used to judge the
host/agent status:
Programing Interface = 0: host
Programing Interface = 1: Agent

In PCIE system, both the Programing Interface and Header type can
be used to judge the RC/EP status.
Header Type = 0: EP
Header Type = 1: RC

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 458ed3bee663..069aa75e7161 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1747,10 +1747,13 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
 static void fixup_hide_host_resource_fsl(struct pci_dev *dev)
 {
         int i, class = dev->class >> 8;
+        /* When configured as agent, programing interface = 1 */
+        int prog_if = dev->class & 0xf;
 
         if ((class == PCI_CLASS_PROCESSOR_POWERPC ||
              class == PCI_CLASS_BRIDGE_OTHER) &&
                 (dev->hdr_type == PCI_HEADER_TYPE_NORMAL) &&
+                (prog_if == 0) &&
                 (dev->bus->parent == NULL)) {
                 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
                         dev->resource[i].start = 0;