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author | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-09-25 04:19:00 -0400 |
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committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-10-03 02:50:21 -0400 |
commit | 3f639ee8c52c187d8c95db430ac6f485bffbe5af (patch) | |
tree | 26299497413aba786f962960c4a3cf83aa81f42b /arch/powerpc/kernel/misc_64.S | |
parent | fc246c389db7b08b4a054e68c742c6598b02523c (diff) |
[POWERPC] implement BEGIN/END_FW_FTR_SECTION
and use it an all the obvious places in assembler code.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/powerpc/kernel/misc_64.S')
-rw-r--r-- | arch/powerpc/kernel/misc_64.S | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index e3ed21cd3d94..465a7641cd0f 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -325,6 +325,52 @@ _GLOBAL(do_cpu_ftr_fixups) | |||
325 | isync | 325 | isync |
326 | b 1b | 326 | b 1b |
327 | 327 | ||
328 | /* | ||
329 | * do_fw_ftr_fixups - goes through the list of firmware feature fixups | ||
330 | * and writes nop's over sections of code that don't apply for this firmware. | ||
331 | * r3 = data offset (not changed) | ||
332 | */ | ||
333 | _GLOBAL(do_fw_ftr_fixups) | ||
334 | /* Get firmware features */ | ||
335 | LOAD_REG_IMMEDIATE(r6,powerpc_firmware_features) | ||
336 | sub r6,r6,r3 | ||
337 | ld r4,0(r6) | ||
338 | /* Get the fixup table */ | ||
339 | LOAD_REG_IMMEDIATE(r6,__start___fw_ftr_fixup) | ||
340 | sub r6,r6,r3 | ||
341 | LOAD_REG_IMMEDIATE(r7,__stop___fw_ftr_fixup) | ||
342 | sub r7,r7,r3 | ||
343 | /* Do the fixup */ | ||
344 | 1: cmpld r6,r7 | ||
345 | bgelr | ||
346 | addi r6,r6,32 | ||
347 | ld r8,-32(r6) /* mask */ | ||
348 | and r8,r8,r4 | ||
349 | ld r9,-24(r6) /* value */ | ||
350 | cmpld r8,r9 | ||
351 | beq 1b | ||
352 | ld r8,-16(r6) /* section begin */ | ||
353 | ld r9,-8(r6) /* section end */ | ||
354 | subf. r9,r8,r9 | ||
355 | beq 1b | ||
356 | /* write nops over the section of code */ | ||
357 | /* todo: if large section, add a branch at the start of it */ | ||
358 | srwi r9,r9,2 | ||
359 | mtctr r9 | ||
360 | sub r8,r8,r3 | ||
361 | lis r0,0x60000000@h /* nop */ | ||
362 | 3: stw r0,0(r8) | ||
363 | BEGIN_FTR_SECTION | ||
364 | dcbst 0,r8 /* suboptimal, but simpler */ | ||
365 | sync | ||
366 | icbi 0,r8 | ||
367 | END_FTR_SECTION_IFSET(CPU_FTR_SPLIT_ID_CACHE) | ||
368 | addi r8,r8,4 | ||
369 | bdnz 3b | ||
370 | sync /* additional sync needed on g4 */ | ||
371 | isync | ||
372 | b 1b | ||
373 | |||
328 | #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) | 374 | #if defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) |
329 | /* | 375 | /* |
330 | * Do an IO access in real mode | 376 | * Do an IO access in real mode |