diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-12-13 18:01:37 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-12-13 18:02:47 -0500 |
commit | e5e774d8833de1a0037be2384efccadf16935675 (patch) | |
tree | faab96f099076670dd73eb85b19d532b0fd2efa6 /arch/powerpc/kernel/misc_32.S | |
parent | ab44f4627e2160cddbddbe8aa8b1d2b2e1559790 (diff) |
powerpc/fsl-booke: Fix problem with _tlbil_va being interrupted
An example calling sequence which we did see:
copy_user_highpage -> kmap_atomic -> flush_tlb_page -> _tlbil_va
We got interrupted after setting up the MAS registers before the
tlbwe and the interrupt handler that caused the interrupt also did
a kmap_atomic (ide code) and thus on returning from the interrupt
the MAS registers no longer contained the proper values.
Since we dont save/restore MAS registers for normal interrupts we
need to disable interrupts in _tlbil_va to ensure atomicity.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/misc_32.S')
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index bdc8b0e860e5..d108715129e2 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -479,6 +479,8 @@ _GLOBAL(_tlbil_pid) | |||
479 | * (no broadcast) | 479 | * (no broadcast) |
480 | */ | 480 | */ |
481 | _GLOBAL(_tlbil_va) | 481 | _GLOBAL(_tlbil_va) |
482 | mfmsr r10 | ||
483 | wrteei 0 | ||
482 | slwi r4,r4,16 | 484 | slwi r4,r4,16 |
483 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ | 485 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ |
484 | tlbsx 0,r3 | 486 | tlbsx 0,r3 |
@@ -490,6 +492,7 @@ _GLOBAL(_tlbil_va) | |||
490 | tlbwe | 492 | tlbwe |
491 | msync | 493 | msync |
492 | isync | 494 | isync |
495 | wrtee r10 | ||
493 | blr | 496 | blr |
494 | #endif /* CONFIG_FSL_BOOKE */ | 497 | #endif /* CONFIG_FSL_BOOKE */ |
495 | 498 | ||