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authorStephen Rothwell <sfr@canb.auug.org.au>2006-06-27 21:55:49 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-28 01:19:00 -0400
commit127efeb286bb772019236182a1b4fc14ff2ae00c (patch)
treeb33c93d9a076ee4d194124b3167f6fbd91b46b61 /arch/powerpc/kernel/misc_32.S
parenta240da35a1087804cbdc3faba949445e64d1eecb (diff)
[POWERPC] Consolidate some of kernel/misc*.S
There were some common functions (mainly i/o). Also some small white space cleanups and remove a couple of small unused functions. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/misc_32.S')
-rw-r--r--arch/powerpc/kernel/misc_32.S156
1 files changed, 0 insertions, 156 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 01d3916c4cb1..c74774e2175d 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -61,32 +61,6 @@ _GLOBAL(mulhdu)
61 blr 61 blr
62 62
63/* 63/*
64 * Returns (address we're running at) - (address we were linked at)
65 * for use before the text and data are mapped to KERNELBASE.
66 */
67_GLOBAL(reloc_offset)
68 mflr r0
69 bl 1f
701: mflr r3
71 LOAD_REG_IMMEDIATE(r4,1b)
72 subf r3,r4,r3
73 mtlr r0
74 blr
75
76/*
77 * add_reloc_offset(x) returns x + reloc_offset().
78 */
79_GLOBAL(add_reloc_offset)
80 mflr r0
81 bl 1f
821: mflr r5
83 LOAD_REG_IMMEDIATE(r4,1b)
84 subf r5,r4,r5
85 add r3,r3,r5
86 mtlr r0
87 blr
88
89/*
90 * sub_reloc_offset(x) returns x - reloc_offset(). 64 * sub_reloc_offset(x) returns x - reloc_offset().
91 */ 65 */
92_GLOBAL(sub_reloc_offset) 66_GLOBAL(sub_reloc_offset)
@@ -781,136 +755,6 @@ _GLOBAL(atomic_set_mask)
781 blr 755 blr
782 756
783/* 757/*
784 * I/O string operations
785 *
786 * insb(port, buf, len)
787 * outsb(port, buf, len)
788 * insw(port, buf, len)
789 * outsw(port, buf, len)
790 * insl(port, buf, len)
791 * outsl(port, buf, len)
792 * insw_ns(port, buf, len)
793 * outsw_ns(port, buf, len)
794 * insl_ns(port, buf, len)
795 * outsl_ns(port, buf, len)
796 *
797 * The *_ns versions don't do byte-swapping.
798 */
799_GLOBAL(_insb)
800 cmpwi 0,r5,0
801 mtctr r5
802 subi r4,r4,1
803 blelr-
80400: lbz r5,0(r3)
805 eieio
806 stbu r5,1(r4)
807 bdnz 00b
808 blr
809
810_GLOBAL(_outsb)
811 cmpwi 0,r5,0
812 mtctr r5
813 subi r4,r4,1
814 blelr-
81500: lbzu r5,1(r4)
816 stb r5,0(r3)
817 eieio
818 bdnz 00b
819 blr
820
821_GLOBAL(_insw)
822 cmpwi 0,r5,0
823 mtctr r5
824 subi r4,r4,2
825 blelr-
82600: lhbrx r5,0,r3
827 eieio
828 sthu r5,2(r4)
829 bdnz 00b
830 blr
831
832_GLOBAL(_outsw)
833 cmpwi 0,r5,0
834 mtctr r5
835 subi r4,r4,2
836 blelr-
83700: lhzu r5,2(r4)
838 eieio
839 sthbrx r5,0,r3
840 bdnz 00b
841 blr
842
843_GLOBAL(_insl)
844 cmpwi 0,r5,0
845 mtctr r5
846 subi r4,r4,4
847 blelr-
84800: lwbrx r5,0,r3
849 eieio
850 stwu r5,4(r4)
851 bdnz 00b
852 blr
853
854_GLOBAL(_outsl)
855 cmpwi 0,r5,0
856 mtctr r5
857 subi r4,r4,4
858 blelr-
85900: lwzu r5,4(r4)
860 stwbrx r5,0,r3
861 eieio
862 bdnz 00b
863 blr
864
865_GLOBAL(__ide_mm_insw)
866_GLOBAL(_insw_ns)
867 cmpwi 0,r5,0
868 mtctr r5
869 subi r4,r4,2
870 blelr-
87100: lhz r5,0(r3)
872 eieio
873 sthu r5,2(r4)
874 bdnz 00b
875 blr
876
877_GLOBAL(__ide_mm_outsw)
878_GLOBAL(_outsw_ns)
879 cmpwi 0,r5,0
880 mtctr r5
881 subi r4,r4,2
882 blelr-
88300: lhzu r5,2(r4)
884 sth r5,0(r3)
885 eieio
886 bdnz 00b
887 blr
888
889_GLOBAL(__ide_mm_insl)
890_GLOBAL(_insl_ns)
891 cmpwi 0,r5,0
892 mtctr r5
893 subi r4,r4,4
894 blelr-
89500: lwz r5,0(r3)
896 eieio
897 stwu r5,4(r4)
898 bdnz 00b
899 blr
900
901_GLOBAL(__ide_mm_outsl)
902_GLOBAL(_outsl_ns)
903 cmpwi 0,r5,0
904 mtctr r5
905 subi r4,r4,4
906 blelr-
90700: lwzu r5,4(r4)
908 stw r5,0(r3)
909 eieio
910 bdnz 00b
911 blr
912
913/*
914 * Extended precision shifts. 758 * Extended precision shifts.
915 * 759 *
916 * Updated to be valid for shift counts from 0 to 63 inclusive. 760 * Updated to be valid for shift counts from 0 to 63 inclusive.