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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-10-24 02:42:40 -0400
committerPaul Mackerras <paulus@samba.org>2006-10-24 21:42:10 -0400
commit42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc (patch)
tree368a26a61085e567357b3974e7799e56069032eb /arch/powerpc/kernel/misc_32.S
parentfb20f65a01a97bdf4bb746eecfc24a08561e2648 (diff)
[POWERPC] Consolidate feature fixup code
There are currently two versions of the functions for applying the feature fixups, one for CPU features and one for firmware features. In addition, they are both in assembly and with separate implementations for 32 and 64 bits. identify_cpu() is also implemented in assembly and separately for 32 and 64 bits. This patch replaces them with a pair of C functions. The call sites are slightly moved on ppc64 as well to be called from C instead of from assembly, though it's a very small change, and thus shouldn't cause any problem. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/misc_32.S')
-rw-r--r--arch/powerpc/kernel/misc_32.S74
1 files changed, 0 insertions, 74 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 88fd73fdf048..412bea3cf813 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -102,80 +102,6 @@ _GLOBAL(reloc_got2)
102 blr 102 blr
103 103
104/* 104/*
105 * identify_cpu,
106 * called with r3 = data offset and r4 = CPU number
107 * doesn't change r3
108 */
109_GLOBAL(identify_cpu)
110 addis r8,r3,cpu_specs@ha
111 addi r8,r8,cpu_specs@l
112 mfpvr r7
1131:
114 lwz r5,CPU_SPEC_PVR_MASK(r8)
115 and r5,r5,r7
116 lwz r6,CPU_SPEC_PVR_VALUE(r8)
117 cmplw 0,r6,r5
118 beq 1f
119 addi r8,r8,CPU_SPEC_ENTRY_SIZE
120 b 1b
1211:
122 addis r6,r3,cur_cpu_spec@ha
123 addi r6,r6,cur_cpu_spec@l
124 sub r8,r8,r3
125 stw r8,0(r6)
126 blr
127
128/*
129 * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
130 * and writes nop's over sections of code that don't apply for this cpu.
131 * r3 = data offset (not changed)
132 */
133_GLOBAL(do_cpu_ftr_fixups)
134 /* Get CPU 0 features */
135 addis r6,r3,cur_cpu_spec@ha
136 addi r6,r6,cur_cpu_spec@l
137 lwz r4,0(r6)
138 add r4,r4,r3
139 lwz r4,CPU_SPEC_FEATURES(r4)
140
141 /* Get the fixup table */
142 addis r6,r3,__start___ftr_fixup@ha
143 addi r6,r6,__start___ftr_fixup@l
144 addis r7,r3,__stop___ftr_fixup@ha
145 addi r7,r7,__stop___ftr_fixup@l
146
147 /* Do the fixup */
1481: cmplw 0,r6,r7
149 bgelr
150 addi r6,r6,16
151 lwz r8,-16(r6) /* mask */
152 and r8,r8,r4
153 lwz r9,-12(r6) /* value */
154 cmplw 0,r8,r9
155 beq 1b
156 lwz r8,-8(r6) /* section begin */
157 lwz r9,-4(r6) /* section end */
158 subf. r9,r8,r9
159 beq 1b
160 /* write nops over the section of code */
161 /* todo: if large section, add a branch at the start of it */
162 srwi r9,r9,2
163 mtctr r9
164 add r8,r8,r3
165 lis r0,0x60000000@h /* nop */
1663: stw r0,0(r8)
167 andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
168 beq 2f
169 dcbst 0,r8 /* suboptimal, but simpler */
170 sync
171 icbi 0,r8
1722: addi r8,r8,4
173 bdnz 3b
174 sync /* additional sync needed on g4 */
175 isync
176 b 1b
177
178/*
179 * call_setup_cpu - call the setup_cpu function for this cpu 105 * call_setup_cpu - call the setup_cpu function for this cpu
180 * r3 = data offset, r24 = cpu number 106 * r3 = data offset, r24 = cpu number
181 * 107 *