diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 14:32:34 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-29 14:32:34 -0400 |
commit | 3aa590c6b7c89d844f81c2e96f295cf2c6967773 (patch) | |
tree | 6f18b295b1ff4cd7fd1880db6f56721599d64439 /arch/powerpc/kernel/misc.S | |
parent | 4d3ce21fa9d2eaeda113aa2f9c2da80d972bef64 (diff) | |
parent | 339d76c54336443f5050b00172beb675f35e3be0 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (43 commits)
[POWERPC] Use little-endian bit from firmware ibm,pa-features property
[POWERPC] Make sure smp_processor_id works very early in boot
[POWERPC] U4 DART improvements
[POWERPC] todc: add support for Time-Of-Day-Clock
[POWERPC] Make lparcfg.c work when both iseries and pseries are selected
[POWERPC] Fix idr locking in init_new_context
[POWERPC] mpc7448hpc2 (taiga) board config file
[POWERPC] Add tsi108 pci and platform device data register function
[POWERPC] Add general support for mpc7448hpc2 (Taiga) platform
[POWERPC] Correct the MAX_CONTEXT definition
powerpc: minor cleanups for mpc86xx
[POWERPC] Make sure we select CONFIG_NEW_LEDS if ADB_PMU_LED is set
[POWERPC] Simplify the code defining the 64-bit CPU features
[POWERPC] powerpc: kconfig warning fix
[POWERPC] Consolidate some of kernel/misc*.S
[POWERPC] Remove unused function call_with_mmu_off
[POWERPC] update asm-powerpc/time.h
[POWERPC] Clean up it_lp_queue.h
[POWERPC] Skip the "copy down" of the kernel if it is already at zero.
[POWERPC] Add the use of the firmware soft-reset-nmi to kdump.
...
Diffstat (limited to 'arch/powerpc/kernel/misc.S')
-rw-r--r-- | arch/powerpc/kernel/misc.S | 203 |
1 files changed, 203 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S new file mode 100644 index 000000000000..fc23040d5a26 --- /dev/null +++ b/arch/powerpc/kernel/misc.S | |||
@@ -0,0 +1,203 @@ | |||
1 | /* | ||
2 | * This file contains miscellaneous low-level functions. | ||
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
4 | * | ||
5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | ||
6 | * and Paul Mackerras. | ||
7 | * | ||
8 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | ||
9 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version | ||
14 | * 2 of the License, or (at your option) any later version. | ||
15 | */ | ||
16 | #include <asm/ppc_asm.h> | ||
17 | |||
18 | .text | ||
19 | |||
20 | #ifdef CONFIG_PPC64 | ||
21 | #define IN_SYNC twi 0,r5,0; isync | ||
22 | #define EIEIO_32 | ||
23 | #define SYNC_64 sync | ||
24 | #else /* CONFIG_PPC32 */ | ||
25 | #define IN_SYNC | ||
26 | #define EIEIO_32 eieio | ||
27 | #define SYNC_64 | ||
28 | #endif | ||
29 | /* | ||
30 | * Returns (address we are running at) - (address we were linked at) | ||
31 | * for use before the text and data are mapped to KERNELBASE. | ||
32 | */ | ||
33 | |||
34 | _GLOBAL(reloc_offset) | ||
35 | mflr r0 | ||
36 | bl 1f | ||
37 | 1: mflr r3 | ||
38 | LOAD_REG_IMMEDIATE(r4,1b) | ||
39 | subf r3,r4,r3 | ||
40 | mtlr r0 | ||
41 | blr | ||
42 | |||
43 | /* | ||
44 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
45 | */ | ||
46 | _GLOBAL(add_reloc_offset) | ||
47 | mflr r0 | ||
48 | bl 1f | ||
49 | 1: mflr r5 | ||
50 | LOAD_REG_IMMEDIATE(r4,1b) | ||
51 | subf r5,r4,r5 | ||
52 | add r3,r3,r5 | ||
53 | mtlr r0 | ||
54 | blr | ||
55 | |||
56 | /* | ||
57 | * I/O string operations | ||
58 | * | ||
59 | * insb(port, buf, len) | ||
60 | * outsb(port, buf, len) | ||
61 | * insw(port, buf, len) | ||
62 | * outsw(port, buf, len) | ||
63 | * insl(port, buf, len) | ||
64 | * outsl(port, buf, len) | ||
65 | * insw_ns(port, buf, len) | ||
66 | * outsw_ns(port, buf, len) | ||
67 | * insl_ns(port, buf, len) | ||
68 | * outsl_ns(port, buf, len) | ||
69 | * | ||
70 | * The *_ns versions don't do byte-swapping. | ||
71 | */ | ||
72 | _GLOBAL(_insb) | ||
73 | cmpwi 0,r5,0 | ||
74 | mtctr r5 | ||
75 | subi r4,r4,1 | ||
76 | blelr- | ||
77 | 00: lbz r5,0(r3) | ||
78 | eieio | ||
79 | stbu r5,1(r4) | ||
80 | bdnz 00b | ||
81 | IN_SYNC | ||
82 | blr | ||
83 | |||
84 | _GLOBAL(_outsb) | ||
85 | cmpwi 0,r5,0 | ||
86 | mtctr r5 | ||
87 | subi r4,r4,1 | ||
88 | blelr- | ||
89 | 00: lbzu r5,1(r4) | ||
90 | stb r5,0(r3) | ||
91 | EIEIO_32 | ||
92 | bdnz 00b | ||
93 | SYNC_64 | ||
94 | blr | ||
95 | |||
96 | _GLOBAL(_insw) | ||
97 | cmpwi 0,r5,0 | ||
98 | mtctr r5 | ||
99 | subi r4,r4,2 | ||
100 | blelr- | ||
101 | 00: lhbrx r5,0,r3 | ||
102 | eieio | ||
103 | sthu r5,2(r4) | ||
104 | bdnz 00b | ||
105 | IN_SYNC | ||
106 | blr | ||
107 | |||
108 | _GLOBAL(_outsw) | ||
109 | cmpwi 0,r5,0 | ||
110 | mtctr r5 | ||
111 | subi r4,r4,2 | ||
112 | blelr- | ||
113 | 00: lhzu r5,2(r4) | ||
114 | EIEIO_32 | ||
115 | sthbrx r5,0,r3 | ||
116 | bdnz 00b | ||
117 | SYNC_64 | ||
118 | blr | ||
119 | |||
120 | _GLOBAL(_insl) | ||
121 | cmpwi 0,r5,0 | ||
122 | mtctr r5 | ||
123 | subi r4,r4,4 | ||
124 | blelr- | ||
125 | 00: lwbrx r5,0,r3 | ||
126 | eieio | ||
127 | stwu r5,4(r4) | ||
128 | bdnz 00b | ||
129 | IN_SYNC | ||
130 | blr | ||
131 | |||
132 | _GLOBAL(_outsl) | ||
133 | cmpwi 0,r5,0 | ||
134 | mtctr r5 | ||
135 | subi r4,r4,4 | ||
136 | blelr- | ||
137 | 00: lwzu r5,4(r4) | ||
138 | stwbrx r5,0,r3 | ||
139 | EIEIO_32 | ||
140 | bdnz 00b | ||
141 | SYNC_64 | ||
142 | blr | ||
143 | |||
144 | #ifdef CONFIG_PPC32 | ||
145 | _GLOBAL(__ide_mm_insw) | ||
146 | #endif | ||
147 | _GLOBAL(_insw_ns) | ||
148 | cmpwi 0,r5,0 | ||
149 | mtctr r5 | ||
150 | subi r4,r4,2 | ||
151 | blelr- | ||
152 | 00: lhz r5,0(r3) | ||
153 | eieio | ||
154 | sthu r5,2(r4) | ||
155 | bdnz 00b | ||
156 | IN_SYNC | ||
157 | blr | ||
158 | |||
159 | #ifdef CONFIG_PPC32 | ||
160 | _GLOBAL(__ide_mm_outsw) | ||
161 | #endif | ||
162 | _GLOBAL(_outsw_ns) | ||
163 | cmpwi 0,r5,0 | ||
164 | mtctr r5 | ||
165 | subi r4,r4,2 | ||
166 | blelr- | ||
167 | 00: lhzu r5,2(r4) | ||
168 | sth r5,0(r3) | ||
169 | EIEIO_32 | ||
170 | bdnz 00b | ||
171 | SYNC_64 | ||
172 | blr | ||
173 | |||
174 | #ifdef CONFIG_PPC32 | ||
175 | _GLOBAL(__ide_mm_insl) | ||
176 | #endif | ||
177 | _GLOBAL(_insl_ns) | ||
178 | cmpwi 0,r5,0 | ||
179 | mtctr r5 | ||
180 | subi r4,r4,4 | ||
181 | blelr- | ||
182 | 00: lwz r5,0(r3) | ||
183 | eieio | ||
184 | stwu r5,4(r4) | ||
185 | bdnz 00b | ||
186 | IN_SYNC | ||
187 | blr | ||
188 | |||
189 | #ifdef CONFIG_PPC32 | ||
190 | _GLOBAL(__ide_mm_outsl) | ||
191 | #endif | ||
192 | _GLOBAL(_outsl_ns) | ||
193 | cmpwi 0,r5,0 | ||
194 | mtctr r5 | ||
195 | subi r4,r4,4 | ||
196 | blelr- | ||
197 | 00: lwzu r5,4(r4) | ||
198 | stw r5,0(r3) | ||
199 | EIEIO_32 | ||
200 | bdnz 00b | ||
201 | SYNC_64 | ||
202 | blr | ||
203 | |||