diff options
author | Michael Ellerman <michael@ellerman.id.au> | 2011-04-14 18:32:04 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-04-26 23:02:12 -0400 |
commit | ca1769f7a372898f5e3dbb8e4ff53f53f0626ef4 (patch) | |
tree | 7f13926387411e9fe4a8e1bf9a0423f793fad793 /arch/powerpc/kernel/irq.c | |
parent | bd491781097f150687906008d639936a0c00ed90 (diff) |
powerpc: Index crit/dbg/mcheck stacks using cpu number on 64bit
In exc_lvl_ctx_init() we index into the crit/dbg/mcheck stacks using
the hard cpu id, but that assumes the hard cpu id is zero based and
contiguous. That is not the case on A2.
The root of the problem is that the 32bit code has no equivalent of the
paca to allow it to do the hard->soft mapping in assembler. Until the
32bit code is updated to handle that, index the stacks using the soft
cpu ids on 64bit and hard on 32 bit.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/irq.c')
-rw-r--r-- | arch/powerpc/kernel/irq.c | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index f621b7d2d869..ea09512a68c3 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -397,24 +397,28 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | |||
397 | void exc_lvl_ctx_init(void) | 397 | void exc_lvl_ctx_init(void) |
398 | { | 398 | { |
399 | struct thread_info *tp; | 399 | struct thread_info *tp; |
400 | int i, hw_cpu; | 400 | int i, cpu_nr; |
401 | 401 | ||
402 | for_each_possible_cpu(i) { | 402 | for_each_possible_cpu(i) { |
403 | hw_cpu = get_hard_smp_processor_id(i); | 403 | #ifdef CONFIG_PPC64 |
404 | memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE); | 404 | cpu_nr = i; |
405 | tp = critirq_ctx[hw_cpu]; | 405 | #else |
406 | tp->cpu = i; | 406 | cpu_nr = get_hard_smp_processor_id(i); |
407 | #endif | ||
408 | memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE); | ||
409 | tp = critirq_ctx[cpu_nr]; | ||
410 | tp->cpu = cpu_nr; | ||
407 | tp->preempt_count = 0; | 411 | tp->preempt_count = 0; |
408 | 412 | ||
409 | #ifdef CONFIG_BOOKE | 413 | #ifdef CONFIG_BOOKE |
410 | memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE); | 414 | memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE); |
411 | tp = dbgirq_ctx[hw_cpu]; | 415 | tp = dbgirq_ctx[cpu_nr]; |
412 | tp->cpu = i; | 416 | tp->cpu = cpu_nr; |
413 | tp->preempt_count = 0; | 417 | tp->preempt_count = 0; |
414 | 418 | ||
415 | memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE); | 419 | memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE); |
416 | tp = mcheckirq_ctx[hw_cpu]; | 420 | tp = mcheckirq_ctx[cpu_nr]; |
417 | tp->cpu = i; | 421 | tp->cpu = cpu_nr; |
418 | tp->preempt_count = HARDIRQ_OFFSET; | 422 | tp->preempt_count = HARDIRQ_OFFSET; |
419 | #endif | 423 | #endif |
420 | } | 424 | } |