[PATCH] powerpc: Cleanup LOADADDR etc. asm macros

This patch consolidates the variety of macros used for loading 32 or
64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*).  The
idea is to make the set of macros consistent across 32 and 64 bit and
to make it more obvious which is the appropriate one to use in a given
situation.  The new macros and their semantics are described in the
comments in ppc_asm.h.

In the process, we change several places that were unnecessarily using
immediate loads on ppc64 to use the GOT/TOC.  Likewise we cleanup a
couple of places where we were clumsily subtracting PAGE_OFFSET with
asm instructions to use assemble-time arithmetic or the toreal() macro
instead.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index 1494e2f177f7..c16b4afab582 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -38,14 +38,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
         /* We must dynamically check for the NAP feature as it
          * can be cleared by CPU init after the fixups are done
          */
-        LOADBASE(r3,cur_cpu_spec)
-        ld      r4,OFF(cur_cpu_spec)(r3)
+        LOAD_REG_ADDRBASE(r3,cur_cpu_spec)
+        ld      r4,ADDROFF(cur_cpu_spec)(r3)
         ld      r4,CPU_SPEC_FEATURES(r4)
         andi.   r0,r4,CPU_FTR_CAN_NAP
         beqlr
         /* Now check if user or arch enabled NAP mode */
-        LOADBASE(r3,powersave_nap)
-        lwz     r4,OFF(powersave_nap)(r3)
+        LOAD_REG_ADDRBASE(r3,powersave_nap)
+        lwz     r4,ADDROFF(powersave_nap)(r3)
         cmpwi   0,r4,0
         beqlr