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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-05 14:16:12 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-05 14:16:12 -0400
commit5f3d2f2e1a63679cf1c4a4210f2f1cc2f335bef6 (patch)
tree9189bd6c81fe5f982a7ae45d2f3d900176658509 /arch/powerpc/kernel/head_fsl_booke.S
parent283dbd82055eb70ff3b469f812d9c695f18c9641 (diff)
parentd900bd7366463fd96a907b2c212242e2b68b27d8 (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Benjamin Herrenschmidt: "Some highlights in addition to the usual batch of fixes: - 64TB address space support for 64-bit processes by Aneesh Kumar - Gavin Shan did a major cleanup & re-organization of our EEH support code (IBM fancy PCI error handling & recovery infrastructure) which paves the way for supporting different platform backends, along with some rework of the PCIe code for the PowerNV platform in order to remove home made resource allocations and instead use the generic code (which is possible after some small improvements to it done by Gavin). - Uprobes support by Ananth N Mavinakayanahalli - A pile of embedded updates from Freescale folks, including new SoC and board supports, more KVM stuff including preparing for 64-bit BookE KVM support, ePAPR 1.1 updates, etc..." Fixup trivial conflicts in drivers/scsi/ipr.c * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (146 commits) powerpc/iommu: Fix multiple issues with IOMMU pools code powerpc: Fix VMX fix for memcpy case driver/mtd:IFC NAND:Initialise internal SRAM before any write powerpc/fsl-pci: use 'Header Type' to identify PCIE mode powerpc/eeh: Don't release eeh_mutex in eeh_phb_pe_get powerpc: Remove tlb batching hack for nighthawk powerpc: Set paca->data_offset = 0 for boot cpu powerpc/perf: Sample only if SIAR-Valid bit is set in P7+ powerpc/fsl-pci: fix warning when CONFIG_SWIOTLB is disabled powerpc/mpc85xx: Update interrupt handling for IFC controller powerpc/85xx: Enable USB support in p1023rds_defconfig powerpc/smp: Do not disable IPI interrupts during suspend powerpc/eeh: Fix crash on converting OF node to edev powerpc/eeh: Lock module while handling EEH event powerpc/kprobe: Don't emulate store when kprobe stwu r1 powerpc/kprobe: Complete kprobe and migrate exception frame powerpc/kprobe: Introduce a new thread flag powerpc: Remove unused __get_user64() and __put_user64() powerpc/eeh: Global mutex to protect PE tree powerpc/eeh: Remove EEH PE for normal PCI hotplug ...
Diffstat (limited to 'arch/powerpc/kernel/head_fsl_booke.S')
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S46
1 files changed, 32 insertions, 14 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 0f59863c3ade..6f62a737f607 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -895,15 +895,11 @@ _GLOBAL(__setup_e500mc_ivors)
895 mtspr SPRN_IVOR36,r3 895 mtspr SPRN_IVOR36,r3
896 li r3,CriticalDoorbell@l 896 li r3,CriticalDoorbell@l
897 mtspr SPRN_IVOR37,r3 897 mtspr SPRN_IVOR37,r3
898 sync
899 blr
898 900
899 /* 901/* setup ehv ivors for */
900 * We only want to touch IVOR38-41 if we're running on hardware 902_GLOBAL(__setup_ehv_ivors)
901 * that supports category E.HV. The architectural way to determine
902 * this is MMUCFG[LPIDSIZE].
903 */
904 mfspr r3, SPRN_MMUCFG
905 andis. r3, r3, MMUCFG_LPIDSIZE@h
906 beq no_hv
907 li r3,GuestDoorbell@l 903 li r3,GuestDoorbell@l
908 mtspr SPRN_IVOR38,r3 904 mtspr SPRN_IVOR38,r3
909 li r3,CriticalGuestDoorbell@l 905 li r3,CriticalGuestDoorbell@l
@@ -912,14 +908,8 @@ _GLOBAL(__setup_e500mc_ivors)
912 mtspr SPRN_IVOR40,r3 908 mtspr SPRN_IVOR40,r3
913 li r3,Ehvpriv@l 909 li r3,Ehvpriv@l
914 mtspr SPRN_IVOR41,r3 910 mtspr SPRN_IVOR41,r3
915skip_hv_ivors:
916 sync 911 sync
917 blr 912 blr
918no_hv:
919 lwz r3, CPU_SPEC_FEATURES(r5)
920 rlwinm r3, r3, 0, ~CPU_FTR_EMB_HV
921 stw r3, CPU_SPEC_FEATURES(r5)
922 b skip_hv_ivors
923 913
924#ifdef CONFIG_SPE 914#ifdef CONFIG_SPE
925/* 915/*
@@ -1043,6 +1033,34 @@ _GLOBAL(flush_dcache_L1)
1043 1033
1044 blr 1034 blr
1045 1035
1036/* Flush L1 d-cache, invalidate and disable d-cache and i-cache */
1037_GLOBAL(__flush_disable_L1)
1038 mflr r10
1039 bl flush_dcache_L1 /* Flush L1 d-cache */
1040 mtlr r10
1041
1042 mfspr r4, SPRN_L1CSR0 /* Invalidate and disable d-cache */
1043 li r5, 2
1044 rlwimi r4, r5, 0, 3
1045
1046 msync
1047 isync
1048 mtspr SPRN_L1CSR0, r4
1049 isync
1050
10511: mfspr r4, SPRN_L1CSR0 /* Wait for the invalidate to finish */
1052 andi. r4, r4, 2
1053 bne 1b
1054
1055 mfspr r4, SPRN_L1CSR1 /* Invalidate and disable i-cache */
1056 li r5, 2
1057 rlwimi r4, r5, 0, 3
1058
1059 mtspr SPRN_L1CSR1, r4
1060 isync
1061
1062 blr
1063
1046#ifdef CONFIG_SMP 1064#ifdef CONFIG_SMP
1047/* When we get here, r24 needs to hold the CPU # */ 1065/* When we get here, r24 needs to hold the CPU # */
1048 .globl __secondary_start 1066 .globl __secondary_start