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authorBecky Bruce <bgill@freescale.com>2007-02-12 18:43:46 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-02-12 22:32:38 -0500
commit8ce0a7df6e6117d8814e976d4b7ce6a6b2c9cf93 (patch)
tree14fb1bec568491b3f1fbc37f2ef6df986617e9bc /arch/powerpc/kernel/head_fsl_booke.S
parentedacf6bb7e7e1b75f2937966a50119439ff78ccb (diff)
[POWERPC] 85xx: Don't write reserved values to MAS1[TSIZE]
Some of the current tlbwe instructions early on in head_fsl_booke.S take advantage of unarchitected behavior that allows the writing of reserved values to the TSIZE field. This patch corrects that, as well as an error where an uninitialized (by linux) value was written into a MAS register and used for a tlbwe. Correct this for both arch/ppc and arch/powerpc. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_fsl_booke.S')
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 66877bdfe0b7..54f40d95cdb9 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */
206 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ 206 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
207 mtspr SPRN_MAS0,r7 207 mtspr SPRN_MAS0,r7
208 tlbre 208 tlbre
209 li r6,0 209 mfspr r6,SPRN_MAS1
210 rlwinm r6,r6,0,2,0 /* clear IPROT */
210 mtspr SPRN_MAS1,r6 211 mtspr SPRN_MAS1,r6
211 tlbwe 212 tlbwe
212 /* Invalidate TLB1 */ 213 /* Invalidate TLB1 */
@@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */
248 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ 249 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
249 mtspr SPRN_MAS0,r7 250 mtspr SPRN_MAS0,r7
250 tlbre 251 tlbre
252 mfspr r8,SPRN_MAS1
253 rlwinm r8,r8,0,2,0 /* clear IPROT */
251 mtspr SPRN_MAS1,r8 254 mtspr SPRN_MAS1,r8
252 tlbwe 255 tlbwe
253 /* Invalidate TLB1 */ 256 /* Invalidate TLB1 */