diff options
| author | Ashish Kalra <Ashish.Kalra@freescale.com> | 2011-04-22 17:48:27 -0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-06-22 22:44:55 -0400 |
| commit | 1325a684b553d4b5c41ae0482f8991b43f945746 (patch) | |
| tree | 38c6be6cc62f49dd5ef44f9fc4e7f347cf3dd845 /arch/powerpc/kernel/head_booke.h | |
| parent | dc2c9c52b604f51b1416ed87ff54a1c77a1a8b5b (diff) | |
powerpc/85xx: Save scratch registers to thread info instead of using SPRGs.
We expect this is actually faster, and we end up needing more space than we
can get from the SPRGs in some instances. This is also useful when running
as a guest OS - SPRGs4-7 do not have guest versions.
8 slots are allocated in thread_info for this even though we only actually
use 4 of them - this allows space for future code to have more scratch
space (and we know we'll need it for things like hugetlb).
Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_booke.h')
| -rw-r--r-- | arch/powerpc/kernel/head_booke.h | 42 |
1 files changed, 26 insertions, 16 deletions
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index a0bf158c8b47..fc921bf62e15 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
| @@ -20,33 +20,43 @@ | |||
| 20 | addi reg,reg,val@l | 20 | addi reg,reg,val@l |
| 21 | #endif | 21 | #endif |
| 22 | 22 | ||
| 23 | /* | ||
| 24 | * Macro used to get to thread save registers. | ||
| 25 | * Note that entries 0-3 are used for the prolog code, and the remaining | ||
| 26 | * entries are available for specific exception use in the event a handler | ||
| 27 | * requires more than 4 scratch registers. | ||
| 28 | */ | ||
| 29 | #define THREAD_NORMSAVE(offset) (THREAD_NORMSAVES + (offset * 4)) | ||
| 30 | |||
| 23 | #define NORMAL_EXCEPTION_PROLOG \ | 31 | #define NORMAL_EXCEPTION_PROLOG \ |
| 24 | mtspr SPRN_SPRG_WSCRATCH0,r10;/* save two registers to work with */\ | 32 | mtspr SPRN_SPRG_WSCRATCH0, r10; /* save one register */ \ |
| 25 | mtspr SPRN_SPRG_WSCRATCH1,r11; \ | 33 | mfspr r10, SPRN_SPRG_THREAD; \ |
| 26 | mtspr SPRN_SPRG_WSCRATCH2,r1; \ | 34 | stw r11, THREAD_NORMSAVE(0)(r10); \ |
| 27 | mfcr r10; /* save CR in r10 for now */\ | 35 | stw r13, THREAD_NORMSAVE(2)(r10); \ |
| 36 | mfcr r13; /* save CR in r13 for now */\ | ||
| 28 | mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ | 37 | mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ |
| 29 | andi. r11,r11,MSR_PR; \ | 38 | andi. r11,r11,MSR_PR; \ |
| 39 | mr r11, r1; \ | ||
| 30 | beq 1f; \ | 40 | beq 1f; \ |
| 31 | mfspr r1,SPRN_SPRG_THREAD; /* if from user, start at top of */\ | 41 | /* if from user, start at top of this thread's kernel stack */ \ |
| 32 | lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ | 42 | lwz r11, THREAD_INFO-THREAD(r10); \ |
| 33 | ALLOC_STACK_FRAME(r1, THREAD_SIZE); \ | 43 | ALLOC_STACK_FRAME(r11, THREAD_SIZE); \ |
| 34 | 1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ | 44 | 1 : subi r11, r11, INT_FRAME_SIZE; /* Allocate exception frame */ \ |
| 35 | mr r11,r1; \ | 45 | stw r13, _CCR(r11); /* save various registers */ \ |
| 36 | stw r10,_CCR(r11); /* save various registers */\ | ||
| 37 | stw r12,GPR12(r11); \ | 46 | stw r12,GPR12(r11); \ |
| 38 | stw r9,GPR9(r11); \ | 47 | stw r9,GPR9(r11); \ |
| 39 | mfspr r10,SPRN_SPRG_RSCRATCH0; \ | 48 | mfspr r13, SPRN_SPRG_RSCRATCH0; \ |
| 40 | stw r10,GPR10(r11); \ | 49 | stw r13, GPR10(r11); \ |
| 41 | mfspr r12,SPRN_SPRG_RSCRATCH1; \ | 50 | lwz r12, THREAD_NORMSAVE(0)(r10); \ |
| 42 | stw r12,GPR11(r11); \ | 51 | stw r12,GPR11(r11); \ |
| 52 | lwz r13, THREAD_NORMSAVE(2)(r10); /* restore r13 */ \ | ||
| 43 | mflr r10; \ | 53 | mflr r10; \ |
| 44 | stw r10,_LINK(r11); \ | 54 | stw r10,_LINK(r11); \ |
| 45 | mfspr r10,SPRN_SPRG_RSCRATCH2; \ | ||
| 46 | mfspr r12,SPRN_SRR0; \ | 55 | mfspr r12,SPRN_SRR0; \ |
| 47 | stw r10,GPR1(r11); \ | 56 | stw r1, GPR1(r11); \ |
| 48 | mfspr r9,SPRN_SRR1; \ | 57 | mfspr r9,SPRN_SRR1; \ |
| 49 | stw r10,0(r11); \ | 58 | stw r1, 0(r11); \ |
| 59 | mr r1, r11; \ | ||
| 50 | rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ | 60 | rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ |
| 51 | stw r0,GPR0(r11); \ | 61 | stw r0,GPR0(r11); \ |
| 52 | lis r10, STACK_FRAME_REGS_MARKER@ha;/* exception frame marker */ \ | 62 | lis r10, STACK_FRAME_REGS_MARKER@ha;/* exception frame marker */ \ |