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authorMichael Ellerman <michael@ellerman.id.au>2006-06-23 04:15:37 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-27 21:59:46 -0400
commit1dce0e30471ac863fd141d137c98e3644817975e (patch)
treea5ee64549f4bf81a24de05ad514614d5e39826ee /arch/powerpc/kernel/head_64.S
parent5f50867b4f1938ab80d249206efbec37bba48c39 (diff)
[POWERPC] Remove remaining iSeries debugger cruft
None of this seems to be necessary, so let's see if can remove it and not break anything. Booted on iSeries & pSeries here. NB. we don't remove the hvReleaseData, we just move it down so that the file reads more clearly. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r--arch/powerpc/kernel/head_64.S37
1 files changed, 9 insertions, 28 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 831acbdf2592..be5560a2e441 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -85,34 +85,6 @@ END_FTR_SECTION(0, 1)
85 /* Catch branch to 0 in real mode */ 85 /* Catch branch to 0 in real mode */
86 trap 86 trap
87 87
88#ifdef CONFIG_PPC_ISERIES
89 /*
90 * At offset 0x20, there is a pointer to iSeries LPAR data.
91 * This is required by the hypervisor
92 */
93 . = 0x20
94 .llong hvReleaseData-KERNELBASE
95
96 /*
97 * At offset 0x28 and 0x30 are offsets to the mschunks_map
98 * array (used by the iSeries LPAR debugger to do translation
99 * between physical addresses and absolute addresses) and
100 * to the pidhash table (also used by the debugger)
101 */
102 .llong mschunks_map-KERNELBASE
103 .llong 0 /* pidhash-KERNELBASE SFRXXX */
104
105 /* Offset 0x38 - Pointer to start of embedded System.map */
106 .globl embedded_sysmap_start
107embedded_sysmap_start:
108 .llong 0
109 /* Offset 0x40 - Pointer to end of embedded System.map */
110 .globl embedded_sysmap_end
111embedded_sysmap_end:
112 .llong 0
113
114#endif /* CONFIG_PPC_ISERIES */
115
116 /* Secondary processors spin on this value until it goes to 1. */ 88 /* Secondary processors spin on this value until it goes to 1. */
117 .globl __secondary_hold_spinloop 89 .globl __secondary_hold_spinloop
118__secondary_hold_spinloop: 90__secondary_hold_spinloop:
@@ -124,6 +96,15 @@ __secondary_hold_spinloop:
124__secondary_hold_acknowledge: 96__secondary_hold_acknowledge:
125 .llong 0x0 97 .llong 0x0
126 98
99#ifdef CONFIG_PPC_ISERIES
100 /*
101 * At offset 0x20, there is a pointer to iSeries LPAR data.
102 * This is required by the hypervisor
103 */
104 . = 0x20
105 .llong hvReleaseData-KERNELBASE
106#endif /* CONFIG_PPC_ISERIES */
107
127 . = 0x60 108 . = 0x60
128/* 109/*
129 * The following code is used on pSeries to hold secondary processors 110 * The following code is used on pSeries to hold secondary processors