diff options
author | Len Brown <len.brown@intel.com> | 2006-06-29 19:57:46 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2006-06-29 19:57:46 -0400 |
commit | d120cfb544ed6161b9d32fb6c4648c471807ee6b (patch) | |
tree | 7757ad0198d8df76ff5c60f939a687687c41da00 /arch/powerpc/kernel/head_64.S | |
parent | 9dce0e950dbfab4148f35ac6f297d8638cdc63c4 (diff) | |
parent | bf7e8511088963078484132636839b59e25cf14f (diff) |
merge linus into release branch
Conflicts:
drivers/acpi/acpi_memhotplug.c
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r-- | arch/powerpc/kernel/head_64.S | 62 |
1 files changed, 12 insertions, 50 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 831acbdf2592..8cfd040d1f50 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -85,34 +85,6 @@ END_FTR_SECTION(0, 1) | |||
85 | /* Catch branch to 0 in real mode */ | 85 | /* Catch branch to 0 in real mode */ |
86 | trap | 86 | trap |
87 | 87 | ||
88 | #ifdef CONFIG_PPC_ISERIES | ||
89 | /* | ||
90 | * At offset 0x20, there is a pointer to iSeries LPAR data. | ||
91 | * This is required by the hypervisor | ||
92 | */ | ||
93 | . = 0x20 | ||
94 | .llong hvReleaseData-KERNELBASE | ||
95 | |||
96 | /* | ||
97 | * At offset 0x28 and 0x30 are offsets to the mschunks_map | ||
98 | * array (used by the iSeries LPAR debugger to do translation | ||
99 | * between physical addresses and absolute addresses) and | ||
100 | * to the pidhash table (also used by the debugger) | ||
101 | */ | ||
102 | .llong mschunks_map-KERNELBASE | ||
103 | .llong 0 /* pidhash-KERNELBASE SFRXXX */ | ||
104 | |||
105 | /* Offset 0x38 - Pointer to start of embedded System.map */ | ||
106 | .globl embedded_sysmap_start | ||
107 | embedded_sysmap_start: | ||
108 | .llong 0 | ||
109 | /* Offset 0x40 - Pointer to end of embedded System.map */ | ||
110 | .globl embedded_sysmap_end | ||
111 | embedded_sysmap_end: | ||
112 | .llong 0 | ||
113 | |||
114 | #endif /* CONFIG_PPC_ISERIES */ | ||
115 | |||
116 | /* Secondary processors spin on this value until it goes to 1. */ | 88 | /* Secondary processors spin on this value until it goes to 1. */ |
117 | .globl __secondary_hold_spinloop | 89 | .globl __secondary_hold_spinloop |
118 | __secondary_hold_spinloop: | 90 | __secondary_hold_spinloop: |
@@ -124,6 +96,15 @@ __secondary_hold_spinloop: | |||
124 | __secondary_hold_acknowledge: | 96 | __secondary_hold_acknowledge: |
125 | .llong 0x0 | 97 | .llong 0x0 |
126 | 98 | ||
99 | #ifdef CONFIG_PPC_ISERIES | ||
100 | /* | ||
101 | * At offset 0x20, there is a pointer to iSeries LPAR data. | ||
102 | * This is required by the hypervisor | ||
103 | */ | ||
104 | . = 0x20 | ||
105 | .llong hvReleaseData-KERNELBASE | ||
106 | #endif /* CONFIG_PPC_ISERIES */ | ||
107 | |||
127 | . = 0x60 | 108 | . = 0x60 |
128 | /* | 109 | /* |
129 | * The following code is used on pSeries to hold secondary processors | 110 | * The following code is used on pSeries to hold secondary processors |
@@ -1602,9 +1583,6 @@ _GLOBAL(__start_initialization_multiplatform) | |||
1602 | /* Setup some critical 970 SPRs before switching MMU off */ | 1583 | /* Setup some critical 970 SPRs before switching MMU off */ |
1603 | bl .__970_cpu_preinit | 1584 | bl .__970_cpu_preinit |
1604 | 1585 | ||
1605 | /* cpu # */ | ||
1606 | li r24,0 | ||
1607 | |||
1608 | /* Switch off MMU if not already */ | 1586 | /* Switch off MMU if not already */ |
1609 | LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) | 1587 | LOAD_REG_IMMEDIATE(r4, .__after_prom_start - KERNELBASE) |
1610 | add r4,r4,r30 | 1588 | add r4,r4,r30 |
@@ -1683,6 +1661,9 @@ _STATIC(__after_prom_start) | |||
1683 | /* i.e. where we are running */ | 1661 | /* i.e. where we are running */ |
1684 | /* the source addr */ | 1662 | /* the source addr */ |
1685 | 1663 | ||
1664 | cmpdi r4,0 /* In some cases the loader may */ | ||
1665 | beq .start_here_multiplatform /* have already put us at zero */ | ||
1666 | /* so we can skip the copy. */ | ||
1686 | LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */ | 1667 | LOAD_REG_IMMEDIATE(r5,copy_to_here) /* # bytes of memory to copy */ |
1687 | sub r5,r5,r27 | 1668 | sub r5,r5,r27 |
1688 | 1669 | ||
@@ -1962,14 +1943,6 @@ _STATIC(start_here_common) | |||
1962 | li r3,0 | 1943 | li r3,0 |
1963 | bl .do_cpu_ftr_fixups | 1944 | bl .do_cpu_ftr_fixups |
1964 | 1945 | ||
1965 | LOAD_REG_IMMEDIATE(r26, boot_cpuid) | ||
1966 | lwz r26,0(r26) | ||
1967 | |||
1968 | LOAD_REG_IMMEDIATE(r24, paca) /* Get base vaddr of paca array */ | ||
1969 | mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ | ||
1970 | add r13,r13,r24 /* for this processor. */ | ||
1971 | mtspr SPRN_SPRG3,r13 | ||
1972 | |||
1973 | /* ptr to current */ | 1946 | /* ptr to current */ |
1974 | LOAD_REG_IMMEDIATE(r4, init_task) | 1947 | LOAD_REG_IMMEDIATE(r4, init_task) |
1975 | std r4,PACACURRENT(r13) | 1948 | std r4,PACACURRENT(r13) |
@@ -1995,17 +1968,6 @@ _STATIC(start_here_common) | |||
1995 | /* Not reached */ | 1968 | /* Not reached */ |
1996 | BUG_OPCODE | 1969 | BUG_OPCODE |
1997 | 1970 | ||
1998 | /* Put the paca pointer into r13 and SPRG3 */ | ||
1999 | _GLOBAL(setup_boot_paca) | ||
2000 | LOAD_REG_IMMEDIATE(r3, boot_cpuid) | ||
2001 | lwz r3,0(r3) | ||
2002 | LOAD_REG_IMMEDIATE(r4, paca) /* Get base vaddr of paca array */ | ||
2003 | mulli r3,r3,PACA_SIZE /* Calculate vaddr of right paca */ | ||
2004 | add r13,r3,r4 /* for this processor. */ | ||
2005 | mtspr SPRN_SPRG3,r13 | ||
2006 | |||
2007 | blr | ||
2008 | |||
2009 | /* | 1971 | /* |
2010 | * We put a few things here that have to be page-aligned. | 1972 | * We put a few things here that have to be page-aligned. |
2011 | * This stuff goes at the beginning of the bss, which is page-aligned. | 1973 | * This stuff goes at the beginning of the bss, which is page-aligned. |