diff options
author | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-09-25 04:19:00 -0400 |
---|---|---|
committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-10-03 02:50:21 -0400 |
commit | 3f639ee8c52c187d8c95db430ac6f485bffbe5af (patch) | |
tree | 26299497413aba786f962960c4a3cf83aa81f42b /arch/powerpc/kernel/head_64.S | |
parent | fc246c389db7b08b4a054e68c742c6598b02523c (diff) |
[POWERPC] implement BEGIN/END_FW_FTR_SECTION
and use it an all the obvious places in assembler code.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/powerpc/kernel/head_64.S')
-rw-r--r-- | arch/powerpc/kernel/head_64.S | 28 |
1 files changed, 25 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 3065b472b95d..645c7f10fb28 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/hvcall.h> | 33 | #include <asm/hvcall.h> |
34 | #include <asm/iseries/lpar_map.h> | 34 | #include <asm/iseries/lpar_map.h> |
35 | #include <asm/thread_info.h> | 35 | #include <asm/thread_info.h> |
36 | #include <asm/firmware.h> | ||
36 | 37 | ||
37 | #ifdef CONFIG_PPC_ISERIES | 38 | #ifdef CONFIG_PPC_ISERIES |
38 | #define DO_SOFT_DISABLE | 39 | #define DO_SOFT_DISABLE |
@@ -365,19 +366,28 @@ label##_iSeries: \ | |||
365 | 366 | ||
366 | #ifdef DO_SOFT_DISABLE | 367 | #ifdef DO_SOFT_DISABLE |
367 | #define DISABLE_INTS \ | 368 | #define DISABLE_INTS \ |
369 | BEGIN_FW_FTR_SECTION; \ | ||
368 | lbz r10,PACAPROCENABLED(r13); \ | 370 | lbz r10,PACAPROCENABLED(r13); \ |
369 | li r11,0; \ | 371 | li r11,0; \ |
370 | std r10,SOFTE(r1); \ | 372 | std r10,SOFTE(r1); \ |
371 | mfmsr r10; \ | 373 | mfmsr r10; \ |
372 | stb r11,PACAPROCENABLED(r13); \ | 374 | stb r11,PACAPROCENABLED(r13); \ |
373 | ori r10,r10,MSR_EE; \ | 375 | ori r10,r10,MSR_EE; \ |
374 | mtmsrd r10,1 | 376 | mtmsrd r10,1; \ |
377 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
375 | 378 | ||
376 | #define ENABLE_INTS \ | 379 | #define ENABLE_INTS \ |
380 | BEGIN_FW_FTR_SECTION; \ | ||
377 | lbz r10,PACAPROCENABLED(r13); \ | 381 | lbz r10,PACAPROCENABLED(r13); \ |
378 | mfmsr r11; \ | 382 | mfmsr r11; \ |
379 | std r10,SOFTE(r1); \ | 383 | std r10,SOFTE(r1); \ |
380 | ori r11,r11,MSR_EE; \ | 384 | ori r11,r11,MSR_EE; \ |
385 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES); \ | ||
386 | BEGIN_FW_FTR_SECTION; \ | ||
387 | ld r12,_MSR(r1); \ | ||
388 | mfmsr r11; \ | ||
389 | rlwimi r11,r12,0,MSR_EE; \ | ||
390 | END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \ | ||
381 | mtmsrd r11,1 | 391 | mtmsrd r11,1 |
382 | 392 | ||
383 | #else /* hard enable/disable interrupts */ | 393 | #else /* hard enable/disable interrupts */ |
@@ -1071,8 +1081,10 @@ _GLOBAL(slb_miss_realmode) | |||
1071 | ld r3,PACA_EXSLB+EX_R3(r13) | 1081 | ld r3,PACA_EXSLB+EX_R3(r13) |
1072 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | 1082 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ |
1073 | #ifdef CONFIG_PPC_ISERIES | 1083 | #ifdef CONFIG_PPC_ISERIES |
1084 | BEGIN_FW_FTR_SECTION | ||
1074 | ld r11,PACALPPACAPTR(r13) | 1085 | ld r11,PACALPPACAPTR(r13) |
1075 | ld r11,LPPACASRR0(r11) /* get SRR0 value */ | 1086 | ld r11,LPPACASRR0(r11) /* get SRR0 value */ |
1087 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
1076 | #endif /* CONFIG_PPC_ISERIES */ | 1088 | #endif /* CONFIG_PPC_ISERIES */ |
1077 | 1089 | ||
1078 | mtlr r10 | 1090 | mtlr r10 |
@@ -1087,8 +1099,10 @@ _GLOBAL(slb_miss_realmode) | |||
1087 | .machine pop | 1099 | .machine pop |
1088 | 1100 | ||
1089 | #ifdef CONFIG_PPC_ISERIES | 1101 | #ifdef CONFIG_PPC_ISERIES |
1102 | BEGIN_FW_FTR_SECTION | ||
1090 | mtspr SPRN_SRR0,r11 | 1103 | mtspr SPRN_SRR0,r11 |
1091 | mtspr SPRN_SRR1,r12 | 1104 | mtspr SPRN_SRR1,r12 |
1105 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
1092 | #endif /* CONFIG_PPC_ISERIES */ | 1106 | #endif /* CONFIG_PPC_ISERIES */ |
1093 | ld r9,PACA_EXSLB+EX_R9(r13) | 1107 | ld r9,PACA_EXSLB+EX_R9(r13) |
1094 | ld r10,PACA_EXSLB+EX_R10(r13) | 1108 | ld r10,PACA_EXSLB+EX_R10(r13) |
@@ -1301,6 +1315,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | |||
1301 | cmpdi r3,0 /* see if hash_page succeeded */ | 1315 | cmpdi r3,0 /* see if hash_page succeeded */ |
1302 | 1316 | ||
1303 | #ifdef DO_SOFT_DISABLE | 1317 | #ifdef DO_SOFT_DISABLE |
1318 | BEGIN_FW_FTR_SECTION | ||
1304 | /* | 1319 | /* |
1305 | * If we had interrupts soft-enabled at the point where the | 1320 | * If we had interrupts soft-enabled at the point where the |
1306 | * DSI/ISI occurred, and an interrupt came in during hash_page, | 1321 | * DSI/ISI occurred, and an interrupt came in during hash_page, |
@@ -1321,12 +1336,14 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) | |||
1321 | ld r3,SOFTE(r1) | 1336 | ld r3,SOFTE(r1) |
1322 | bl .local_irq_restore | 1337 | bl .local_irq_restore |
1323 | b 11f | 1338 | b 11f |
1324 | #else | 1339 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) |
1340 | #endif | ||
1341 | BEGIN_FW_FTR_SECTION | ||
1325 | beq fast_exception_return /* Return from exception on success */ | 1342 | beq fast_exception_return /* Return from exception on success */ |
1326 | ble- 12f /* Failure return from hash_page */ | 1343 | ble- 12f /* Failure return from hash_page */ |
1327 | 1344 | ||
1328 | /* fall through */ | 1345 | /* fall through */ |
1329 | #endif | 1346 | END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES) |
1330 | 1347 | ||
1331 | /* Here we have a page fault that hash_page can't handle. */ | 1348 | /* Here we have a page fault that hash_page can't handle. */ |
1332 | _GLOBAL(handle_page_fault) | 1349 | _GLOBAL(handle_page_fault) |
@@ -1861,7 +1878,9 @@ _GLOBAL(__secondary_start) | |||
1861 | LOAD_REG_ADDR(r3, .start_secondary_prolog) | 1878 | LOAD_REG_ADDR(r3, .start_secondary_prolog) |
1862 | LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) | 1879 | LOAD_REG_IMMEDIATE(r4, MSR_KERNEL) |
1863 | #ifdef DO_SOFT_DISABLE | 1880 | #ifdef DO_SOFT_DISABLE |
1881 | BEGIN_FW_FTR_SECTION | ||
1864 | ori r4,r4,MSR_EE | 1882 | ori r4,r4,MSR_EE |
1883 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
1865 | #endif | 1884 | #endif |
1866 | mtspr SPRN_SRR0,r3 | 1885 | mtspr SPRN_SRR0,r3 |
1867 | mtspr SPRN_SRR1,r4 | 1886 | mtspr SPRN_SRR1,r4 |
@@ -1986,6 +2005,7 @@ _STATIC(start_here_common) | |||
1986 | */ | 2005 | */ |
1987 | li r3,0 | 2006 | li r3,0 |
1988 | bl .do_cpu_ftr_fixups | 2007 | bl .do_cpu_ftr_fixups |
2008 | bl .do_fw_ftr_fixups | ||
1989 | 2009 | ||
1990 | /* ptr to current */ | 2010 | /* ptr to current */ |
1991 | LOAD_REG_IMMEDIATE(r4, init_task) | 2011 | LOAD_REG_IMMEDIATE(r4, init_task) |
@@ -2000,11 +2020,13 @@ _STATIC(start_here_common) | |||
2000 | /* Load up the kernel context */ | 2020 | /* Load up the kernel context */ |
2001 | 5: | 2021 | 5: |
2002 | #ifdef DO_SOFT_DISABLE | 2022 | #ifdef DO_SOFT_DISABLE |
2023 | BEGIN_FW_FTR_SECTION | ||
2003 | li r5,0 | 2024 | li r5,0 |
2004 | stb r5,PACAPROCENABLED(r13) /* Soft Disabled */ | 2025 | stb r5,PACAPROCENABLED(r13) /* Soft Disabled */ |
2005 | mfmsr r5 | 2026 | mfmsr r5 |
2006 | ori r5,r5,MSR_EE /* Hard Enabled */ | 2027 | ori r5,r5,MSR_EE /* Hard Enabled */ |
2007 | mtmsrd r5 | 2028 | mtmsrd r5 |
2029 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) | ||
2008 | #endif | 2030 | #endif |
2009 | 2031 | ||
2010 | bl .start_kernel | 2032 | bl .start_kernel |