[PATCH] powerpc: Allow non zero boot cpuids

We currently have a hack to flip the boot cpu and its secondary thread
to logical cpuid 0 and 1. This means the logical - physical mapping will
differ depending on which cpu is boot cpu. This is most apparent on
kexec, where we might kexec on any cpu and therefore change the mapping
from boot to boot.

The patch below does a first pass early on to work out the logical cpuid
of the boot thread. We then fix up some paca structures to match.

Ive also removed the boot_cpuid_phys variable for ppc64, to be
consistent we use get_hard_smp_processor_id(boot_cpuid) everywhere.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 11 insertions, 15 deletions

diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 7e7f7d243304..a5ae04a57c78 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1851,21 +1851,6 @@ _STATIC(start_here_multiplatform)
         bl      .__save_cpu_setup
         sync
 
-        /* Setup a valid physical PACA pointer in SPRG3 for early_setup
-         * note that boot_cpuid can always be 0 nowadays since there is
-         * nowhere it can be initialized differently before we reach this
-         * code
-         */
-        LOAD_REG_IMMEDIATE(r27, boot_cpuid)
-        add     r27,r27,r26
-        lwz     r27,0(r27)
-
-        LOAD_REG_IMMEDIATE(r24, paca)   /* Get base vaddr of paca array  */
-        mulli   r13,r27,PACA_SIZE       /* Calculate vaddr of right paca */
-        add     r13,r13,r24             /* for this processor.           */
-        add     r13,r13,r26             /* convert to physical addr      */
-        mtspr   SPRN_SPRG3,r13
-        
         /* Do very early kernel initializations, including initial hash table,
          * stab and slb setup before we turn on relocation.     */
 
@@ -1934,6 +1919,17 @@ _STATIC(start_here_common)
         /* Not reached */
         BUG_OPCODE
 
+/* Put the paca pointer into r13 and SPRG3 */
+_GLOBAL(setup_boot_paca)
+        LOAD_REG_IMMEDIATE(r3, boot_cpuid)
+        lwz     r3,0(r3)
+        LOAD_REG_IMMEDIATE(r4, paca)    /* Get base vaddr of paca array  */
+        mulli   r3,r3,PACA_SIZE         /* Calculate vaddr of right paca */
+        add     r13,r3,r4               /* for this processor.           */
+        mtspr   SPRN_SPRG3,r13
+
+        blr
+
 /*
  * We put a few things here that have to be page-aligned.
  * This stuff goes at the beginning of the bss, which is page-aligned.