[POWERPC] Reworking machine check handling and Fix 440/440A

This adds a cputable function pointer for the CPU-side machine
check handling. The semantic is still the same as the old one,
the one in ppc_md. overrides the one in cputable, though
ultimately we'll want to change that so the CPU gets first.

This removes CONFIG_440A which was a problem for multiplatform
kernels and instead fixes up the IVOR at runtime from a setup_cpu
function. The "A" version of the machine check also tweaks the
regs->trap value to differenciate the 2 versions at the C level.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

1 files changed, 10 insertions, 4 deletions

diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 56aba84c1f6e..ad071a146a8d 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -289,11 +289,8 @@ interrupt_base:
         CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
 
         /* Machine Check Interrupt */
-#ifdef CONFIG_440A
-        MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#else
         CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#endif
+        MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
 
         /* Data Storage Interrupt */
         START_EXCEPTION(DataStorage)
@@ -674,6 +671,15 @@ finish_tlb_load:
  */
 
 /*
+ * Adjust the machine check IVOR on 440A cores
+ */
+_GLOBAL(__fixup_440A_mcheck)
+        li      r3,MachineCheckA@l
+        mtspr   SPRN_IVOR1,r3
+        sync
+        blr
+
+/*
  * extern void giveup_altivec(struct task_struct *prev)
  *
  * The 44x core does not have an AltiVec unit.