diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-07-14 16:52:54 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-08-19 20:12:27 -0400 |
commit | ee43eb788b3a06425fffb912677e2e1c8b00dd3b (patch) | |
tree | 7233cb47647837ab00af81270b3a16555d88a1f1 /arch/powerpc/kernel/head_40x.S | |
parent | 8aa34ab8b2dc96ca6c4feecfb87ed13f0d40ef98 (diff) |
powerpc: Use names rather than numbers for SPRGs (v2)
The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.
We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.
This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.
The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_40x.S')
-rw-r--r-- | arch/powerpc/kernel/head_40x.S | 124 |
1 files changed, 62 insertions, 62 deletions
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 0c96911d4299..a90625f9b485 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S | |||
@@ -103,21 +103,21 @@ _ENTRY(saved_ksp_limit) | |||
103 | 103 | ||
104 | /* | 104 | /* |
105 | * Exception vector entry code. This code runs with address translation | 105 | * Exception vector entry code. This code runs with address translation |
106 | * turned off (i.e. using physical addresses). We assume SPRG3 has the | 106 | * turned off (i.e. using physical addresses). We assume SPRG_THREAD has |
107 | * physical address of the current task thread_struct. | 107 | * the physical address of the current task thread_struct. |
108 | * Note that we have to have decremented r1 before we write to any fields | 108 | * Note that we have to have decremented r1 before we write to any fields |
109 | * of the exception frame, since a critical interrupt could occur at any | 109 | * of the exception frame, since a critical interrupt could occur at any |
110 | * time, and it will write to the area immediately below the current r1. | 110 | * time, and it will write to the area immediately below the current r1. |
111 | */ | 111 | */ |
112 | #define NORMAL_EXCEPTION_PROLOG \ | 112 | #define NORMAL_EXCEPTION_PROLOG \ |
113 | mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ | 113 | mtspr SPRN_SPRG_SCRATCH0,r10; /* save two registers to work with */\ |
114 | mtspr SPRN_SPRG1,r11; \ | 114 | mtspr SPRN_SPRG_SCRATCH1,r11; \ |
115 | mtspr SPRN_SPRG2,r1; \ | 115 | mtspr SPRN_SPRG_SCRATCH2,r1; \ |
116 | mfcr r10; /* save CR in r10 for now */\ | 116 | mfcr r10; /* save CR in r10 for now */\ |
117 | mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ | 117 | mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ |
118 | andi. r11,r11,MSR_PR; \ | 118 | andi. r11,r11,MSR_PR; \ |
119 | beq 1f; \ | 119 | beq 1f; \ |
120 | mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ | 120 | mfspr r1,SPRN_SPRG_THREAD; /* if from user, start at top of */\ |
121 | lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ | 121 | lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ |
122 | addi r1,r1,THREAD_SIZE; \ | 122 | addi r1,r1,THREAD_SIZE; \ |
123 | 1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ | 123 | 1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ |
@@ -125,13 +125,13 @@ _ENTRY(saved_ksp_limit) | |||
125 | stw r10,_CCR(r11); /* save various registers */\ | 125 | stw r10,_CCR(r11); /* save various registers */\ |
126 | stw r12,GPR12(r11); \ | 126 | stw r12,GPR12(r11); \ |
127 | stw r9,GPR9(r11); \ | 127 | stw r9,GPR9(r11); \ |
128 | mfspr r10,SPRN_SPRG0; \ | 128 | mfspr r10,SPRN_SPRG_SCRATCH0; \ |
129 | stw r10,GPR10(r11); \ | 129 | stw r10,GPR10(r11); \ |
130 | mfspr r12,SPRN_SPRG1; \ | 130 | mfspr r12,SPRN_SPRG_SCRATCH1; \ |
131 | stw r12,GPR11(r11); \ | 131 | stw r12,GPR11(r11); \ |
132 | mflr r10; \ | 132 | mflr r10; \ |
133 | stw r10,_LINK(r11); \ | 133 | stw r10,_LINK(r11); \ |
134 | mfspr r10,SPRN_SPRG2; \ | 134 | mfspr r10,SPRN_SPRG_SCRATCH2; \ |
135 | mfspr r12,SPRN_SRR0; \ | 135 | mfspr r12,SPRN_SRR0; \ |
136 | stw r10,GPR1(r11); \ | 136 | stw r10,GPR1(r11); \ |
137 | mfspr r9,SPRN_SRR1; \ | 137 | mfspr r9,SPRN_SRR1; \ |
@@ -160,7 +160,7 @@ _ENTRY(saved_ksp_limit) | |||
160 | lwz r11,critirq_ctx@l(r11); \ | 160 | lwz r11,critirq_ctx@l(r11); \ |
161 | beq 1f; \ | 161 | beq 1f; \ |
162 | /* COMING FROM USER MODE */ \ | 162 | /* COMING FROM USER MODE */ \ |
163 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ | 163 | mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\ |
164 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ | 164 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ |
165 | 1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\ | 165 | 1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\ |
166 | tophys(r11,r11); \ | 166 | tophys(r11,r11); \ |
@@ -265,8 +265,8 @@ label: | |||
265 | * and exit. Otherwise, we call heavywight functions to do the work. | 265 | * and exit. Otherwise, we call heavywight functions to do the work. |
266 | */ | 266 | */ |
267 | START_EXCEPTION(0x0300, DataStorage) | 267 | START_EXCEPTION(0x0300, DataStorage) |
268 | mtspr SPRN_SPRG0, r10 /* Save some working registers */ | 268 | mtspr SPRN_SPRG_SCRATCH0, r10 /* Save some working registers */ |
269 | mtspr SPRN_SPRG1, r11 | 269 | mtspr SPRN_SPRG_SCRATCH1, r11 |
270 | #ifdef CONFIG_403GCX | 270 | #ifdef CONFIG_403GCX |
271 | stw r12, 0(r0) | 271 | stw r12, 0(r0) |
272 | stw r9, 4(r0) | 272 | stw r9, 4(r0) |
@@ -275,12 +275,12 @@ label: | |||
275 | stw r11, 8(r0) | 275 | stw r11, 8(r0) |
276 | stw r12, 12(r0) | 276 | stw r12, 12(r0) |
277 | #else | 277 | #else |
278 | mtspr SPRN_SPRG4, r12 | 278 | mtspr SPRN_SPRG_SCRATCH3, r12 |
279 | mtspr SPRN_SPRG5, r9 | 279 | mtspr SPRN_SPRG_SCRATCH4, r9 |
280 | mfcr r11 | 280 | mfcr r11 |
281 | mfspr r12, SPRN_PID | 281 | mfspr r12, SPRN_PID |
282 | mtspr SPRN_SPRG7, r11 | 282 | mtspr SPRN_SPRG_SCRATCH6, r11 |
283 | mtspr SPRN_SPRG6, r12 | 283 | mtspr SPRN_SPRG_SCRATCH5, r12 |
284 | #endif | 284 | #endif |
285 | 285 | ||
286 | /* First, check if it was a zone fault (which means a user | 286 | /* First, check if it was a zone fault (which means a user |
@@ -308,7 +308,7 @@ label: | |||
308 | /* Get the PGD for the current thread. | 308 | /* Get the PGD for the current thread. |
309 | */ | 309 | */ |
310 | 3: | 310 | 3: |
311 | mfspr r11,SPRN_SPRG3 | 311 | mfspr r11,SPRN_SPRG_THREAD |
312 | lwz r11,PGDIR(r11) | 312 | lwz r11,PGDIR(r11) |
313 | 4: | 313 | 4: |
314 | tophys(r11, r11) | 314 | tophys(r11, r11) |
@@ -355,15 +355,15 @@ label: | |||
355 | lwz r9, 4(r0) | 355 | lwz r9, 4(r0) |
356 | lwz r12, 0(r0) | 356 | lwz r12, 0(r0) |
357 | #else | 357 | #else |
358 | mfspr r12, SPRN_SPRG6 | 358 | mfspr r12, SPRN_SPRG_SCRATCH5 |
359 | mfspr r11, SPRN_SPRG7 | 359 | mfspr r11, SPRN_SPRG_SCRATCH6 |
360 | mtspr SPRN_PID, r12 | 360 | mtspr SPRN_PID, r12 |
361 | mtcr r11 | 361 | mtcr r11 |
362 | mfspr r9, SPRN_SPRG5 | 362 | mfspr r9, SPRN_SPRG_SCRATCH4 |
363 | mfspr r12, SPRN_SPRG4 | 363 | mfspr r12, SPRN_SPRG_SCRATCH3 |
364 | #endif | 364 | #endif |
365 | mfspr r11, SPRN_SPRG1 | 365 | mfspr r11, SPRN_SPRG_SCRATCH1 |
366 | mfspr r10, SPRN_SPRG0 | 366 | mfspr r10, SPRN_SPRG_SCRATCH0 |
367 | PPC405_ERR77_SYNC | 367 | PPC405_ERR77_SYNC |
368 | rfi /* Should sync shadow TLBs */ | 368 | rfi /* Should sync shadow TLBs */ |
369 | b . /* prevent prefetch past rfi */ | 369 | b . /* prevent prefetch past rfi */ |
@@ -380,15 +380,15 @@ label: | |||
380 | lwz r9, 4(r0) | 380 | lwz r9, 4(r0) |
381 | lwz r12, 0(r0) | 381 | lwz r12, 0(r0) |
382 | #else | 382 | #else |
383 | mfspr r12, SPRN_SPRG6 | 383 | mfspr r12, SPRN_SPRG_SCRATCH5 |
384 | mfspr r11, SPRN_SPRG7 | 384 | mfspr r11, SPRN_SPRG_SCRATCH6 |
385 | mtspr SPRN_PID, r12 | 385 | mtspr SPRN_PID, r12 |
386 | mtcr r11 | 386 | mtcr r11 |
387 | mfspr r9, SPRN_SPRG5 | 387 | mfspr r9, SPRN_SPRG_SCRATCH4 |
388 | mfspr r12, SPRN_SPRG4 | 388 | mfspr r12, SPRN_SPRG_SCRATCH3 |
389 | #endif | 389 | #endif |
390 | mfspr r11, SPRN_SPRG1 | 390 | mfspr r11, SPRN_SPRG_SCRATCH1 |
391 | mfspr r10, SPRN_SPRG0 | 391 | mfspr r10, SPRN_SPRG_SCRATCH0 |
392 | b DataAccess | 392 | b DataAccess |
393 | 393 | ||
394 | /* | 394 | /* |
@@ -466,8 +466,8 @@ label: | |||
466 | * load TLB entries from the page table if they exist. | 466 | * load TLB entries from the page table if they exist. |
467 | */ | 467 | */ |
468 | START_EXCEPTION(0x1100, DTLBMiss) | 468 | START_EXCEPTION(0x1100, DTLBMiss) |
469 | mtspr SPRN_SPRG0, r10 /* Save some working registers */ | 469 | mtspr SPRN_SPRG_SCRATCH0, r10 /* Save some working registers */ |
470 | mtspr SPRN_SPRG1, r11 | 470 | mtspr SPRN_SPRG_SCRATCH1, r11 |
471 | #ifdef CONFIG_403GCX | 471 | #ifdef CONFIG_403GCX |
472 | stw r12, 0(r0) | 472 | stw r12, 0(r0) |
473 | stw r9, 4(r0) | 473 | stw r9, 4(r0) |
@@ -476,12 +476,12 @@ label: | |||
476 | stw r11, 8(r0) | 476 | stw r11, 8(r0) |
477 | stw r12, 12(r0) | 477 | stw r12, 12(r0) |
478 | #else | 478 | #else |
479 | mtspr SPRN_SPRG4, r12 | 479 | mtspr SPRN_SPRG_SCRATCH3, r12 |
480 | mtspr SPRN_SPRG5, r9 | 480 | mtspr SPRN_SPRG_SCRATCH4, r9 |
481 | mfcr r11 | 481 | mfcr r11 |
482 | mfspr r12, SPRN_PID | 482 | mfspr r12, SPRN_PID |
483 | mtspr SPRN_SPRG7, r11 | 483 | mtspr SPRN_SPRG_SCRATCH6, r11 |
484 | mtspr SPRN_SPRG6, r12 | 484 | mtspr SPRN_SPRG_SCRATCH5, r12 |
485 | #endif | 485 | #endif |
486 | mfspr r10, SPRN_DEAR /* Get faulting address */ | 486 | mfspr r10, SPRN_DEAR /* Get faulting address */ |
487 | 487 | ||
@@ -500,7 +500,7 @@ label: | |||
500 | /* Get the PGD for the current thread. | 500 | /* Get the PGD for the current thread. |
501 | */ | 501 | */ |
502 | 3: | 502 | 3: |
503 | mfspr r11,SPRN_SPRG3 | 503 | mfspr r11,SPRN_SPRG_THREAD |
504 | lwz r11,PGDIR(r11) | 504 | lwz r11,PGDIR(r11) |
505 | 4: | 505 | 4: |
506 | tophys(r11, r11) | 506 | tophys(r11, r11) |
@@ -550,15 +550,15 @@ label: | |||
550 | lwz r9, 4(r0) | 550 | lwz r9, 4(r0) |
551 | lwz r12, 0(r0) | 551 | lwz r12, 0(r0) |
552 | #else | 552 | #else |
553 | mfspr r12, SPRN_SPRG6 | 553 | mfspr r12, SPRN_SPRG_SCRATCH5 |
554 | mfspr r11, SPRN_SPRG7 | 554 | mfspr r11, SPRN_SPRG_SCRATCH6 |
555 | mtspr SPRN_PID, r12 | 555 | mtspr SPRN_PID, r12 |
556 | mtcr r11 | 556 | mtcr r11 |
557 | mfspr r9, SPRN_SPRG5 | 557 | mfspr r9, SPRN_SPRG_SCRATCH4 |
558 | mfspr r12, SPRN_SPRG4 | 558 | mfspr r12, SPRN_SPRG_SCRATCH3 |
559 | #endif | 559 | #endif |
560 | mfspr r11, SPRN_SPRG1 | 560 | mfspr r11, SPRN_SPRG_SCRATCH1 |
561 | mfspr r10, SPRN_SPRG0 | 561 | mfspr r10, SPRN_SPRG_SCRATCH0 |
562 | b DataAccess | 562 | b DataAccess |
563 | 563 | ||
564 | /* 0x1200 - Instruction TLB Miss Exception | 564 | /* 0x1200 - Instruction TLB Miss Exception |
@@ -566,8 +566,8 @@ label: | |||
566 | * registers and bailout to a different point. | 566 | * registers and bailout to a different point. |
567 | */ | 567 | */ |
568 | START_EXCEPTION(0x1200, ITLBMiss) | 568 | START_EXCEPTION(0x1200, ITLBMiss) |
569 | mtspr SPRN_SPRG0, r10 /* Save some working registers */ | 569 | mtspr SPRN_SPRG_SCRATCH0, r10 /* Save some working registers */ |
570 | mtspr SPRN_SPRG1, r11 | 570 | mtspr SPRN_SPRG_SCRATCH1, r11 |
571 | #ifdef CONFIG_403GCX | 571 | #ifdef CONFIG_403GCX |
572 | stw r12, 0(r0) | 572 | stw r12, 0(r0) |
573 | stw r9, 4(r0) | 573 | stw r9, 4(r0) |
@@ -576,12 +576,12 @@ label: | |||
576 | stw r11, 8(r0) | 576 | stw r11, 8(r0) |
577 | stw r12, 12(r0) | 577 | stw r12, 12(r0) |
578 | #else | 578 | #else |
579 | mtspr SPRN_SPRG4, r12 | 579 | mtspr SPRN_SPRG_SCRATCH3, r12 |
580 | mtspr SPRN_SPRG5, r9 | 580 | mtspr SPRN_SPRG_SCRATCH4, r9 |
581 | mfcr r11 | 581 | mfcr r11 |
582 | mfspr r12, SPRN_PID | 582 | mfspr r12, SPRN_PID |
583 | mtspr SPRN_SPRG7, r11 | 583 | mtspr SPRN_SPRG_SCRATCH6, r11 |
584 | mtspr SPRN_SPRG6, r12 | 584 | mtspr SPRN_SPRG_SCRATCH5, r12 |
585 | #endif | 585 | #endif |
586 | mfspr r10, SPRN_SRR0 /* Get faulting address */ | 586 | mfspr r10, SPRN_SRR0 /* Get faulting address */ |
587 | 587 | ||
@@ -600,7 +600,7 @@ label: | |||
600 | /* Get the PGD for the current thread. | 600 | /* Get the PGD for the current thread. |
601 | */ | 601 | */ |
602 | 3: | 602 | 3: |
603 | mfspr r11,SPRN_SPRG3 | 603 | mfspr r11,SPRN_SPRG_THREAD |
604 | lwz r11,PGDIR(r11) | 604 | lwz r11,PGDIR(r11) |
605 | 4: | 605 | 4: |
606 | tophys(r11, r11) | 606 | tophys(r11, r11) |
@@ -650,15 +650,15 @@ label: | |||
650 | lwz r9, 4(r0) | 650 | lwz r9, 4(r0) |
651 | lwz r12, 0(r0) | 651 | lwz r12, 0(r0) |
652 | #else | 652 | #else |
653 | mfspr r12, SPRN_SPRG6 | 653 | mfspr r12, SPRN_SPRG_SCRATCH5 |
654 | mfspr r11, SPRN_SPRG7 | 654 | mfspr r11, SPRN_SPRG_SCRATCH6 |
655 | mtspr SPRN_PID, r12 | 655 | mtspr SPRN_PID, r12 |
656 | mtcr r11 | 656 | mtcr r11 |
657 | mfspr r9, SPRN_SPRG5 | 657 | mfspr r9, SPRN_SPRG_SCRATCH4 |
658 | mfspr r12, SPRN_SPRG4 | 658 | mfspr r12, SPRN_SPRG_SCRATCH3 |
659 | #endif | 659 | #endif |
660 | mfspr r11, SPRN_SPRG1 | 660 | mfspr r11, SPRN_SPRG_SCRATCH1 |
661 | mfspr r10, SPRN_SPRG0 | 661 | mfspr r10, SPRN_SPRG_SCRATCH0 |
662 | b InstructionAccess | 662 | b InstructionAccess |
663 | 663 | ||
664 | EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE) | 664 | EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE) |
@@ -803,15 +803,15 @@ finish_tlb_load: | |||
803 | lwz r9, 4(r0) | 803 | lwz r9, 4(r0) |
804 | lwz r12, 0(r0) | 804 | lwz r12, 0(r0) |
805 | #else | 805 | #else |
806 | mfspr r12, SPRN_SPRG6 | 806 | mfspr r12, SPRN_SPRG_SCRATCH5 |
807 | mfspr r11, SPRN_SPRG7 | 807 | mfspr r11, SPRN_SPRG_SCRATCH6 |
808 | mtspr SPRN_PID, r12 | 808 | mtspr SPRN_PID, r12 |
809 | mtcr r11 | 809 | mtcr r11 |
810 | mfspr r9, SPRN_SPRG5 | 810 | mfspr r9, SPRN_SPRG_SCRATCH4 |
811 | mfspr r12, SPRN_SPRG4 | 811 | mfspr r12, SPRN_SPRG_SCRATCH3 |
812 | #endif | 812 | #endif |
813 | mfspr r11, SPRN_SPRG1 | 813 | mfspr r11, SPRN_SPRG_SCRATCH1 |
814 | mfspr r10, SPRN_SPRG0 | 814 | mfspr r10, SPRN_SPRG_SCRATCH0 |
815 | PPC405_ERR77_SYNC | 815 | PPC405_ERR77_SYNC |
816 | rfi /* Should sync shadow TLBs */ | 816 | rfi /* Should sync shadow TLBs */ |
817 | b . /* prevent prefetch past rfi */ | 817 | b . /* prevent prefetch past rfi */ |
@@ -835,7 +835,7 @@ start_here: | |||
835 | /* ptr to phys current thread */ | 835 | /* ptr to phys current thread */ |
836 | tophys(r4,r2) | 836 | tophys(r4,r2) |
837 | addi r4,r4,THREAD /* init task's THREAD */ | 837 | addi r4,r4,THREAD /* init task's THREAD */ |
838 | mtspr SPRN_SPRG3,r4 | 838 | mtspr SPRN_SPRG_THREAD,r4 |
839 | 839 | ||
840 | /* stack */ | 840 | /* stack */ |
841 | lis r1,init_thread_union@ha | 841 | lis r1,init_thread_union@ha |