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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2005-11-23 01:57:25 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-08 22:49:54 -0500
commit51d3082fe6e55aecfa17113dbe98077c749f724c (patch)
tree9a1e2355d5988d8cc1ca511d53c1bb24b0baa17f /arch/powerpc/kernel/head_32.S
parent463ce0e103f419f51b1769111e73fe8bb305d0ec (diff)
[PATCH] powerpc: Unify udbg (#2)
This patch unifies udbg for both ppc32 and ppc64 when building the merged achitecture. xmon now has a single "back end". The powermac udbg stuff gets enriched with some ADB capabilities and btext output. In addition, the early_init callback is now called on ppc32 as well, approx. in the same order as ppc64 regarding device-tree manipulations. The init sequences of ppc32 and ppc64 are getting closer, I'll unify them in a later patch. For now, you can force udbg to the scc using "sccdbg" or to btext using "btextdbg" on powermacs. I'll implement a cleaner way of forcing udbg output to something else than the autodetected OF output device in a later patch. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/head_32.S')
-rw-r--r--arch/powerpc/kernel/head_32.S29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index ccdf94731e30..fdd34dbd8797 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -153,6 +153,9 @@ __after_mmu_off:
153 bl flush_tlbs 153 bl flush_tlbs
154 154
155 bl initial_bats 155 bl initial_bats
156#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
157 bl setup_disp_bat
158#endif
156 159
157/* 160/*
158 * Call setup_cpu for CPU 0 and initialize 6xx Idle 161 * Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1306,6 +1309,32 @@ initial_bats:
1306 blr 1309 blr
1307 1310
1308 1311
1312#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
1313setup_disp_bat:
1314 /*
1315 * setup the display bat prepared for us in prom.c
1316 */
1317 mflr r8
1318 bl reloc_offset
1319 mtlr r8
1320 addis r8,r3,disp_BAT@ha
1321 addi r8,r8,disp_BAT@l
1322 cmpwi cr0,r8,0
1323 beqlr
1324 lwz r11,0(r8)
1325 lwz r8,4(r8)
1326 mfspr r9,SPRN_PVR
1327 rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
1328 cmpwi 0,r9,1
1329 beq 1f
1330 mtspr SPRN_DBAT3L,r8
1331 mtspr SPRN_DBAT3U,r11
1332 blr
13331: mtspr SPRN_IBAT3L,r8
1334 mtspr SPRN_IBAT3U,r11
1335 blr
1336#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */
1337
1309#ifdef CONFIG_8260 1338#ifdef CONFIG_8260
1310/* Jump into the system reset for the rom. 1339/* Jump into the system reset for the rom.
1311 * We first disable the MMU, and then jump to the ROM reset address. 1340 * We first disable the MMU, and then jump to the ROM reset address.