diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 00:55:47 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-12 00:55:47 -0400 |
commit | e86908614f2c7fec401827e5cefd7a6ea9407f85 (patch) | |
tree | fcb5d9e52422b37bdaf0e647126ebdfc1680f162 /arch/powerpc/kernel/head_32.S | |
parent | 547307420931344a868275bd7ea7a30f117a15a9 (diff) | |
parent | 9b4b8feb962f4b3e74768b7205f1f8f6cce87238 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (408 commits)
[POWERPC] Add memchr() to the bootwrapper
[POWERPC] Implement logging of unhandled signals
[POWERPC] Add legacy serial support for OPB with flattened device tree
[POWERPC] Use 1TB segments
[POWERPC] XilinxFB: Allow fixed framebuffer base address
[POWERPC] XilinxFB: Add support for custom screen resolution
[POWERPC] XilinxFB: Use pdata to pass around framebuffer parameters
[POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pci
[POWERPC] 4xx: Kilauea defconfig file
[POWERPC] 4xx: Kilauea DTS
[POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40x
[POWERPC] 4xx: Add AMCC 405EX support to cputable.c
[POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capable
[POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers
[POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfig
[POWERPC] 85xx: Killed <asm/mpc85xx.h>
[POWERPC] 85xx: Add cpm nodes for 8541/8555 CDS
[POWERPC] 85xx: Convert mpc8560ads to the new CPM binding.
[POWERPC] mpc8272ads: Remove muram from the CPM reg property.
[POWERPC] Make clockevents work on PPC601 processors
...
Fixed up conflict in Documentation/powerpc/booting-without-of.txt manually.
Diffstat (limited to 'arch/powerpc/kernel/head_32.S')
-rw-r--r-- | arch/powerpc/kernel/head_32.S | 71 |
1 files changed, 38 insertions, 33 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index 7d73a13450b0..a5b13ae7fd20 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -48,20 +48,17 @@ | |||
48 | mtspr SPRN_DBAT##n##L,RB; \ | 48 | mtspr SPRN_DBAT##n##L,RB; \ |
49 | 1: | 49 | 1: |
50 | 50 | ||
51 | .text | 51 | .section .text.head, "ax" |
52 | .stabs "arch/powerpc/kernel/",N_SO,0,0,0f | 52 | .stabs "arch/powerpc/kernel/",N_SO,0,0,0f |
53 | .stabs "head_32.S",N_SO,0,0,0f | 53 | .stabs "head_32.S",N_SO,0,0,0f |
54 | 0: | 54 | 0: |
55 | .globl _stext | 55 | _ENTRY(_stext); |
56 | _stext: | ||
57 | 56 | ||
58 | /* | 57 | /* |
59 | * _start is defined this way because the XCOFF loader in the OpenFirmware | 58 | * _start is defined this way because the XCOFF loader in the OpenFirmware |
60 | * on the powermac expects the entry point to be a procedure descriptor. | 59 | * on the powermac expects the entry point to be a procedure descriptor. |
61 | */ | 60 | */ |
62 | .text | 61 | _ENTRY(_start); |
63 | .globl _start | ||
64 | _start: | ||
65 | /* | 62 | /* |
66 | * These are here for legacy reasons, the kernel used to | 63 | * These are here for legacy reasons, the kernel used to |
67 | * need to look like a coff function entry for the pmac | 64 | * need to look like a coff function entry for the pmac |
@@ -152,6 +149,9 @@ __after_mmu_off: | |||
152 | #if defined(CONFIG_BOOTX_TEXT) | 149 | #if defined(CONFIG_BOOTX_TEXT) |
153 | bl setup_disp_bat | 150 | bl setup_disp_bat |
154 | #endif | 151 | #endif |
152 | #ifdef CONFIG_PPC_EARLY_DEBUG_CPM | ||
153 | bl setup_cpm_bat | ||
154 | #endif | ||
155 | 155 | ||
156 | /* | 156 | /* |
157 | * Call setup_cpu for CPU 0 and initialize 6xx Idle | 157 | * Call setup_cpu for CPU 0 and initialize 6xx Idle |
@@ -469,16 +469,16 @@ InstructionTLBMiss: | |||
469 | mfctr r0 | 469 | mfctr r0 |
470 | /* Get PTE (linux-style) and check access */ | 470 | /* Get PTE (linux-style) and check access */ |
471 | mfspr r3,SPRN_IMISS | 471 | mfspr r3,SPRN_IMISS |
472 | lis r1,KERNELBASE@h /* check if kernel address */ | 472 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
473 | cmplw 0,r3,r1 | 473 | cmplw 0,r1,r3 |
474 | mfspr r2,SPRN_SPRG3 | 474 | mfspr r2,SPRN_SPRG3 |
475 | li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ | 475 | li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ |
476 | lwz r2,PGDIR(r2) | 476 | lwz r2,PGDIR(r2) |
477 | blt+ 112f | 477 | bge- 112f |
478 | mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
479 | rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
478 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ | 480 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ |
479 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ | 481 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ |
480 | mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
481 | rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
482 | 112: tophys(r2,r2) | 482 | 112: tophys(r2,r2) |
483 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ | 483 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ |
484 | lwz r2,0(r2) /* get pmd entry */ | 484 | lwz r2,0(r2) /* get pmd entry */ |
@@ -543,16 +543,16 @@ DataLoadTLBMiss: | |||
543 | mfctr r0 | 543 | mfctr r0 |
544 | /* Get PTE (linux-style) and check access */ | 544 | /* Get PTE (linux-style) and check access */ |
545 | mfspr r3,SPRN_DMISS | 545 | mfspr r3,SPRN_DMISS |
546 | lis r1,KERNELBASE@h /* check if kernel address */ | 546 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
547 | cmplw 0,r3,r1 | 547 | cmplw 0,r1,r3 |
548 | mfspr r2,SPRN_SPRG3 | 548 | mfspr r2,SPRN_SPRG3 |
549 | li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ | 549 | li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ |
550 | lwz r2,PGDIR(r2) | 550 | lwz r2,PGDIR(r2) |
551 | blt+ 112f | 551 | bge- 112f |
552 | mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
553 | rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
552 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ | 554 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ |
553 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ | 555 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ |
554 | mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
555 | rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
556 | 112: tophys(r2,r2) | 556 | 112: tophys(r2,r2) |
557 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ | 557 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ |
558 | lwz r2,0(r2) /* get pmd entry */ | 558 | lwz r2,0(r2) /* get pmd entry */ |
@@ -615,16 +615,16 @@ DataStoreTLBMiss: | |||
615 | mfctr r0 | 615 | mfctr r0 |
616 | /* Get PTE (linux-style) and check access */ | 616 | /* Get PTE (linux-style) and check access */ |
617 | mfspr r3,SPRN_DMISS | 617 | mfspr r3,SPRN_DMISS |
618 | lis r1,KERNELBASE@h /* check if kernel address */ | 618 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
619 | cmplw 0,r3,r1 | 619 | cmplw 0,r1,r3 |
620 | mfspr r2,SPRN_SPRG3 | 620 | mfspr r2,SPRN_SPRG3 |
621 | li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ | 621 | li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ |
622 | lwz r2,PGDIR(r2) | 622 | lwz r2,PGDIR(r2) |
623 | blt+ 112f | 623 | bge- 112f |
624 | mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
625 | rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
624 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ | 626 | lis r2,swapper_pg_dir@ha /* if kernel address, use */ |
625 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ | 627 | addi r2,r2,swapper_pg_dir@l /* kernel page table */ |
626 | mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ | ||
627 | rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ | ||
628 | 112: tophys(r2,r2) | 628 | 112: tophys(r2,r2) |
629 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ | 629 | rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ |
630 | lwz r2,0(r2) /* get pmd entry */ | 630 | lwz r2,0(r2) /* get pmd entry */ |
@@ -841,7 +841,7 @@ relocate_kernel: | |||
841 | * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset | 841 | * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset |
842 | * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. | 842 | * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. |
843 | */ | 843 | */ |
844 | _GLOBAL(copy_and_flush) | 844 | _ENTRY(copy_and_flush) |
845 | addi r5,r5,-4 | 845 | addi r5,r5,-4 |
846 | addi r6,r6,-4 | 846 | addi r6,r6,-4 |
847 | 4: li r0,L1_CACHE_BYTES/4 | 847 | 4: li r0,L1_CACHE_BYTES/4 |
@@ -954,9 +954,9 @@ __secondary_start: | |||
954 | * included in CONFIG_6xx | 954 | * included in CONFIG_6xx |
955 | */ | 955 | */ |
956 | #if !defined(CONFIG_6xx) | 956 | #if !defined(CONFIG_6xx) |
957 | _GLOBAL(__save_cpu_setup) | 957 | _ENTRY(__save_cpu_setup) |
958 | blr | 958 | blr |
959 | _GLOBAL(__restore_cpu_setup) | 959 | _ENTRY(__restore_cpu_setup) |
960 | blr | 960 | blr |
961 | #endif /* !defined(CONFIG_6xx) */ | 961 | #endif /* !defined(CONFIG_6xx) */ |
962 | 962 | ||
@@ -1080,7 +1080,7 @@ start_here: | |||
1080 | /* | 1080 | /* |
1081 | * Set up the segment registers for a new context. | 1081 | * Set up the segment registers for a new context. |
1082 | */ | 1082 | */ |
1083 | _GLOBAL(set_context) | 1083 | _ENTRY(set_context) |
1084 | mulli r3,r3,897 /* multiply context by skew factor */ | 1084 | mulli r3,r3,897 /* multiply context by skew factor */ |
1085 | rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */ | 1085 | rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */ |
1086 | addis r3,r3,0x6000 /* Set Ks, Ku bits */ | 1086 | addis r3,r3,0x6000 /* Set Ks, Ku bits */ |
@@ -1248,6 +1248,19 @@ setup_disp_bat: | |||
1248 | blr | 1248 | blr |
1249 | #endif /* CONFIG_BOOTX_TEXT */ | 1249 | #endif /* CONFIG_BOOTX_TEXT */ |
1250 | 1250 | ||
1251 | #ifdef CONFIG_PPC_EARLY_DEBUG_CPM | ||
1252 | setup_cpm_bat: | ||
1253 | lis r8, 0xf000 | ||
1254 | ori r8, r8, 0x002a | ||
1255 | mtspr SPRN_DBAT1L, r8 | ||
1256 | |||
1257 | lis r11, 0xf000 | ||
1258 | ori r11, r11, (BL_1M << 2) | 2 | ||
1259 | mtspr SPRN_DBAT1U, r11 | ||
1260 | |||
1261 | blr | ||
1262 | #endif | ||
1263 | |||
1251 | #ifdef CONFIG_8260 | 1264 | #ifdef CONFIG_8260 |
1252 | /* Jump into the system reset for the rom. | 1265 | /* Jump into the system reset for the rom. |
1253 | * We first disable the MMU, and then jump to the ROM reset address. | 1266 | * We first disable the MMU, and then jump to the ROM reset address. |
@@ -1300,14 +1313,6 @@ empty_zero_page: | |||
1300 | swapper_pg_dir: | 1313 | swapper_pg_dir: |
1301 | .space 4096 | 1314 | .space 4096 |
1302 | 1315 | ||
1303 | /* | ||
1304 | * This space gets a copy of optional info passed to us by the bootstrap | ||
1305 | * Used to pass parameters into the kernel like root=/dev/sda1, etc. | ||
1306 | */ | ||
1307 | .globl cmd_line | ||
1308 | cmd_line: | ||
1309 | .space 512 | ||
1310 | |||
1311 | .globl intercept_table | 1316 | .globl intercept_table |
1312 | intercept_table: | 1317 | intercept_table: |
1313 | .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700 | 1318 | .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700 |