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authorKumar Gala <galak@kernel.crashing.org>2009-02-12 17:12:40 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-02-12 17:51:33 -0500
commit70fe3af8403f85196bb74f22ce4813db7dfedc1a (patch)
treee82d3e5ee4b93b0a336df183d6dff5fe04cccab6 /arch/powerpc/kernel/entry_32.S
parentd66c82ea456853a71d88359b0c19a92ac1d393ff (diff)
powerpc/book-3e: Introduce concept of Book-3e MMU
The Power ISA 2.06 spec introduces a standard MMU programming model that is based on the Freescale Book-E MMU programing model. The Freescale version is pretty backwards compatiable with the ISA 2.06 definition so we are starting to refactor some of the Freescale code so it can be easily shared. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/entry_32.S')
-rw-r--r--arch/powerpc/kernel/entry_32.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 6f7eb7e00c79..301c646d1a7d 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -63,7 +63,7 @@ debug_transfer_to_handler:
63 63
64 .globl crit_transfer_to_handler 64 .globl crit_transfer_to_handler
65crit_transfer_to_handler: 65crit_transfer_to_handler:
66#ifdef CONFIG_FSL_BOOKE 66#ifdef CONFIG_PPC_BOOK3E_MMU
67 mfspr r0,SPRN_MAS0 67 mfspr r0,SPRN_MAS0
68 stw r0,MAS0(r11) 68 stw r0,MAS0(r11)
69 mfspr r0,SPRN_MAS1 69 mfspr r0,SPRN_MAS1
@@ -78,7 +78,7 @@ crit_transfer_to_handler:
78 mfspr r0,SPRN_MAS7 78 mfspr r0,SPRN_MAS7
79 stw r0,MAS7(r11) 79 stw r0,MAS7(r11)
80#endif /* CONFIG_PHYS_64BIT */ 80#endif /* CONFIG_PHYS_64BIT */
81#endif /* CONFIG_FSL_BOOKE */ 81#endif /* CONFIG_PPC_BOOK3E_MMU */
82#ifdef CONFIG_44x 82#ifdef CONFIG_44x
83 mfspr r0,SPRN_MMUCR 83 mfspr r0,SPRN_MMUCR
84 stw r0,MMUCR(r11) 84 stw r0,MMUCR(r11)
@@ -914,7 +914,7 @@ exc_exit_restart_end:
914 mtspr SPRN_##exc_lvl_srr0,r9; \ 914 mtspr SPRN_##exc_lvl_srr0,r9; \
915 mtspr SPRN_##exc_lvl_srr1,r10; 915 mtspr SPRN_##exc_lvl_srr1,r10;
916 916
917#if defined(CONFIG_FSL_BOOKE) 917#if defined(CONFIG_PPC_BOOK3E_MMU)
918#ifdef CONFIG_PHYS_64BIT 918#ifdef CONFIG_PHYS_64BIT
919#define RESTORE_MAS7 \ 919#define RESTORE_MAS7 \
920 lwz r11,MAS7(r1); \ 920 lwz r11,MAS7(r1); \