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authorSteven Rostedt <rostedt@goodmis.org>2009-02-11 15:01:18 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-02-22 18:48:54 -0500
commitbf528a3a9bd11b6ae39684b18c9c0678f23924fd (patch)
tree2d9b872ebb5484c9537e355ae7d0cbc1351afd92 /arch/powerpc/kernel/entry_32.S
parentbb7253403f7a4670a128e4c080fd8ea1bd4d5029 (diff)
powerpc32, ftrace: save and restore mcount regs with macro
Impact: clean up Use a macro to save and restore the registers for PowerPC32, since that code is duplicated. This is similar to the work done by Cyrill Gorcunov for the mcount code in x86_64. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/entry_32.S')
-rw-r--r--arch/powerpc/kernel/entry_32.S68
1 files changed, 9 insertions, 59 deletions
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 301c646d1a7d..fd54cb59728e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -1176,59 +1176,22 @@ _GLOBAL(_mcount)
1176 bctr 1176 bctr
1177 1177
1178_GLOBAL(ftrace_caller) 1178_GLOBAL(ftrace_caller)
1179 /* Based off of objdump optput from glibc */ 1179 MCOUNT_SAVE_FRAME
1180 stwu r1,-48(r1) 1180 /* r3 ends up with link register */
1181 stw r3, 12(r1)
1182 stw r4, 16(r1)
1183 stw r5, 20(r1)
1184 stw r6, 24(r1)
1185 mflr r3
1186 lwz r4, 52(r1)
1187 mfcr r5
1188 stw r7, 28(r1)
1189 stw r8, 32(r1)
1190 stw r9, 36(r1)
1191 stw r10,40(r1)
1192 stw r3, 44(r1)
1193 stw r5, 8(r1)
1194 subi r3, r3, MCOUNT_INSN_SIZE 1181 subi r3, r3, MCOUNT_INSN_SIZE
1195.globl ftrace_call 1182.globl ftrace_call
1196ftrace_call: 1183ftrace_call:
1197 bl ftrace_stub 1184 bl ftrace_stub
1198 nop 1185 nop
1199 lwz r6, 8(r1) 1186
1200 lwz r0, 44(r1) 1187 MCOUNT_RESTORE_FRAME
1201 lwz r3, 12(r1) 1188 /* old link register ends up in ctr reg */
1202 mtctr r0
1203 lwz r4, 16(r1)
1204 mtcr r6
1205 lwz r5, 20(r1)
1206 lwz r6, 24(r1)
1207 lwz r0, 52(r1)
1208 lwz r7, 28(r1)
1209 lwz r8, 32(r1)
1210 mtlr r0
1211 lwz r9, 36(r1)
1212 lwz r10,40(r1)
1213 addi r1, r1, 48
1214 bctr 1189 bctr
1215#else 1190#else
1216_GLOBAL(mcount) 1191_GLOBAL(mcount)
1217_GLOBAL(_mcount) 1192_GLOBAL(_mcount)
1218 stwu r1,-48(r1) 1193
1219 stw r3, 12(r1) 1194 MCOUNT_SAVE_FRAME
1220 stw r4, 16(r1)
1221 stw r5, 20(r1)
1222 stw r6, 24(r1)
1223 mflr r3
1224 lwz r4, 52(r1)
1225 mfcr r5
1226 stw r7, 28(r1)
1227 stw r8, 32(r1)
1228 stw r9, 36(r1)
1229 stw r10,40(r1)
1230 stw r3, 44(r1)
1231 stw r5, 8(r1)
1232 1195
1233 subi r3, r3, MCOUNT_INSN_SIZE 1196 subi r3, r3, MCOUNT_INSN_SIZE
1234 LOAD_REG_ADDR(r5, ftrace_trace_function) 1197 LOAD_REG_ADDR(r5, ftrace_trace_function)
@@ -1239,21 +1202,8 @@ _GLOBAL(_mcount)
1239 1202
1240 nop 1203 nop
1241 1204
1242 lwz r6, 8(r1) 1205 MCOUNT_RESTORE_FRAME
1243 lwz r0, 44(r1) 1206
1244 lwz r3, 12(r1)
1245 mtctr r0
1246 lwz r4, 16(r1)
1247 mtcr r6
1248 lwz r5, 20(r1)
1249 lwz r6, 24(r1)
1250 lwz r0, 52(r1)
1251 lwz r7, 28(r1)
1252 lwz r8, 32(r1)
1253 mtlr r0
1254 lwz r9, 36(r1)
1255 lwz r10,40(r1)
1256 addi r1, r1, 48
1257 bctr 1207 bctr
1258#endif 1208#endif
1259 1209