Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (209 commits)
  [POWERPC] Create add_rtc() function to enable the RTC CMOS driver
  [POWERPC] Add H_ILLAN_ATTRIBUTES hcall number
  [POWERPC] xilinxfb: Parameterize xilinxfb platform device registration
  [POWERPC] Oprofile support for Power 5++
  [POWERPC] Enable arbitary speed tty ioctls and split input/output speed
  [POWERPC] Make drivers/char/hvc_console.c:khvcd() static
  [POWERPC] Remove dead code for preventing pread() and pwrite() calls
  [POWERPC] Remove unnecessary #undef printk from prom.c
  [POWERPC] Fix typo in Ebony default DTS
  [POWERPC] Check for NULL ppc_md.init_IRQ() before calling
  [POWERPC] Remove extra return statement
  [POWERPC] pasemi: Don't auto-select CONFIG_EMBEDDED
  [POWERPC] pasemi: Rename platform
  [POWERPC] arch/powerpc/kernel/sysfs.c: Move NUMA exports
  [POWERPC] Add __read_mostly support for powerpc
  [POWERPC] Modify sched_clock() to make CONFIG_PRINTK_TIME more sane
  [POWERPC] Create a dummy zImage if no valid platform has been selected
  [POWERPC] PS3: Bootwrapper support.
  [POWERPC] powermac i2c: Use mutex
  [POWERPC] Schedule removal of arch/ppc
  ...

Fixed up conflicts manually in:

	Documentation/feature-removal-schedule.txt
	arch/powerpc/kernel/pci_32.c
	arch/powerpc/kernel/pci_64.c
	include/asm-powerpc/pci.h

and asked the powerpc people to double-check the result..

1 files changed, 30 insertions, 5 deletions

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b2b5d664d328..b1f8000952f3 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -294,6 +294,21 @@ static struct cpu_spec cpu_specs[] = {
                 .oprofile_mmcra_sipr    = MMCRA_SIPR,
                 .platform               = "power5",
         },
+        {       /* Power5++ */
+                .pvr_mask               = 0xffffff00,
+                .pvr_value              = 0x003b0300,
+                .cpu_name               = "POWER5+ (gs)",
+                .cpu_features           = CPU_FTRS_POWER5,
+                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .oprofile_cpu_type      = "ppc64/power5++",
+                .oprofile_type          = PPC_OPROFILE_POWER4,
+                .oprofile_mmcra_sihv    = MMCRA_SIHV,
+                .oprofile_mmcra_sipr    = MMCRA_SIPR,
+                .platform               = "power5+",
+        },
         {       /* Power5 GS */
                 .pvr_mask               = 0xffff0000,
                 .pvr_value              = 0x003b0000,
@@ -1178,8 +1193,8 @@ static struct cpu_spec cpu_specs[] = {
                 .platform               = "ppc440",
         },
         { /* 440SP Rev. A */
-                .pvr_mask               = 0xff000fff,
-                .pvr_value              = 0x53000891,
+                .pvr_mask               = 0xfff00fff,
+                .pvr_value              = 0x53200891,
                 .cpu_name               = "440SP Rev. A",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
@@ -1188,9 +1203,19 @@ static struct cpu_spec cpu_specs[] = {
                 .platform               = "ppc440",
         },
         { /* 440SPe Rev. A */
-                .pvr_mask               = 0xff000fff,
-                .pvr_value              = 0x53000890,
-                .cpu_name               = "440SPe Rev. A",
+                .pvr_mask               = 0xfff00fff,
+                .pvr_value              = 0x53400890,
+                .cpu_name               = "440SPe Rev. A",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .platform               = "ppc440",
+        },
+        { /* 440SPe Rev. B */
+                .pvr_mask               = 0xfff00fff,
+                .pvr_value              = 0x53400891,
+                .cpu_name               = "440SPe Rev. B",
                 .cpu_features           = CPU_FTRS_44X,
                 .cpu_user_features      = COMMON_USER_BOOKE,
                 .icache_bsize           = 32,