diff options
author | Matt Evans <matt@ozlabs.org> | 2011-04-06 15:48:50 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-04-27 00:18:52 -0400 |
commit | 44ae3ab3358e962039c36ad4ae461ae9fb29596c (patch) | |
tree | 08c0628a5226c0535b7fe236be64b48e5eb0fbd6 /arch/powerpc/kernel/cputable.c | |
parent | eca590f402332ab873d13f2d8d00fa0b91cfff36 (diff) |
powerpc: Free up some CPU feature bits by moving out MMU-related features
Some of the 64bit PPC CPU features are MMU-related, so this patch moves
them to MMU_FTR_ bits. All cpu_has_feature()-style tests are moved to
mmu_has_feature(), and seven feature bits are freed as a result.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/cputable.c')
-rw-r--r-- | arch/powerpc/kernel/cputable.c | 45 |
1 files changed, 19 insertions, 26 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 3d7b65ad4962..34d2722b9451 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -201,7 +201,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
201 | .cpu_name = "POWER4 (gp)", | 201 | .cpu_name = "POWER4 (gp)", |
202 | .cpu_features = CPU_FTRS_POWER4, | 202 | .cpu_features = CPU_FTRS_POWER4, |
203 | .cpu_user_features = COMMON_USER_POWER4, | 203 | .cpu_user_features = COMMON_USER_POWER4, |
204 | .mmu_features = MMU_FTR_HPTE_TABLE, | 204 | .mmu_features = MMU_FTRS_POWER4, |
205 | .icache_bsize = 128, | 205 | .icache_bsize = 128, |
206 | .dcache_bsize = 128, | 206 | .dcache_bsize = 128, |
207 | .num_pmcs = 8, | 207 | .num_pmcs = 8, |
@@ -216,7 +216,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
216 | .cpu_name = "POWER4+ (gq)", | 216 | .cpu_name = "POWER4+ (gq)", |
217 | .cpu_features = CPU_FTRS_POWER4, | 217 | .cpu_features = CPU_FTRS_POWER4, |
218 | .cpu_user_features = COMMON_USER_POWER4, | 218 | .cpu_user_features = COMMON_USER_POWER4, |
219 | .mmu_features = MMU_FTR_HPTE_TABLE, | 219 | .mmu_features = MMU_FTRS_POWER4, |
220 | .icache_bsize = 128, | 220 | .icache_bsize = 128, |
221 | .dcache_bsize = 128, | 221 | .dcache_bsize = 128, |
222 | .num_pmcs = 8, | 222 | .num_pmcs = 8, |
@@ -232,7 +232,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
232 | .cpu_features = CPU_FTRS_PPC970, | 232 | .cpu_features = CPU_FTRS_PPC970, |
233 | .cpu_user_features = COMMON_USER_POWER4 | | 233 | .cpu_user_features = COMMON_USER_POWER4 | |
234 | PPC_FEATURE_HAS_ALTIVEC_COMP, | 234 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
235 | .mmu_features = MMU_FTR_HPTE_TABLE, | 235 | .mmu_features = MMU_FTRS_PPC970, |
236 | .icache_bsize = 128, | 236 | .icache_bsize = 128, |
237 | .dcache_bsize = 128, | 237 | .dcache_bsize = 128, |
238 | .num_pmcs = 8, | 238 | .num_pmcs = 8, |
@@ -250,7 +250,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
250 | .cpu_features = CPU_FTRS_PPC970, | 250 | .cpu_features = CPU_FTRS_PPC970, |
251 | .cpu_user_features = COMMON_USER_POWER4 | | 251 | .cpu_user_features = COMMON_USER_POWER4 | |
252 | PPC_FEATURE_HAS_ALTIVEC_COMP, | 252 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
253 | .mmu_features = MMU_FTR_HPTE_TABLE, | 253 | .mmu_features = MMU_FTRS_PPC970, |
254 | .icache_bsize = 128, | 254 | .icache_bsize = 128, |
255 | .dcache_bsize = 128, | 255 | .dcache_bsize = 128, |
256 | .num_pmcs = 8, | 256 | .num_pmcs = 8, |
@@ -286,7 +286,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
286 | .cpu_features = CPU_FTRS_PPC970, | 286 | .cpu_features = CPU_FTRS_PPC970, |
287 | .cpu_user_features = COMMON_USER_POWER4 | | 287 | .cpu_user_features = COMMON_USER_POWER4 | |
288 | PPC_FEATURE_HAS_ALTIVEC_COMP, | 288 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
289 | .mmu_features = MMU_FTR_HPTE_TABLE, | 289 | .mmu_features = MMU_FTRS_PPC970, |
290 | .icache_bsize = 128, | 290 | .icache_bsize = 128, |
291 | .dcache_bsize = 128, | 291 | .dcache_bsize = 128, |
292 | .num_pmcs = 8, | 292 | .num_pmcs = 8, |
@@ -304,7 +304,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
304 | .cpu_features = CPU_FTRS_PPC970, | 304 | .cpu_features = CPU_FTRS_PPC970, |
305 | .cpu_user_features = COMMON_USER_POWER4 | | 305 | .cpu_user_features = COMMON_USER_POWER4 | |
306 | PPC_FEATURE_HAS_ALTIVEC_COMP, | 306 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
307 | .mmu_features = MMU_FTR_HPTE_TABLE, | 307 | .mmu_features = MMU_FTRS_PPC970, |
308 | .icache_bsize = 128, | 308 | .icache_bsize = 128, |
309 | .dcache_bsize = 128, | 309 | .dcache_bsize = 128, |
310 | .num_pmcs = 8, | 310 | .num_pmcs = 8, |
@@ -320,7 +320,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
320 | .cpu_name = "POWER5 (gr)", | 320 | .cpu_name = "POWER5 (gr)", |
321 | .cpu_features = CPU_FTRS_POWER5, | 321 | .cpu_features = CPU_FTRS_POWER5, |
322 | .cpu_user_features = COMMON_USER_POWER5, | 322 | .cpu_user_features = COMMON_USER_POWER5, |
323 | .mmu_features = MMU_FTR_HPTE_TABLE, | 323 | .mmu_features = MMU_FTRS_POWER5, |
324 | .icache_bsize = 128, | 324 | .icache_bsize = 128, |
325 | .dcache_bsize = 128, | 325 | .dcache_bsize = 128, |
326 | .num_pmcs = 6, | 326 | .num_pmcs = 6, |
@@ -340,7 +340,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
340 | .cpu_name = "POWER5+ (gs)", | 340 | .cpu_name = "POWER5+ (gs)", |
341 | .cpu_features = CPU_FTRS_POWER5, | 341 | .cpu_features = CPU_FTRS_POWER5, |
342 | .cpu_user_features = COMMON_USER_POWER5_PLUS, | 342 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
343 | .mmu_features = MMU_FTR_HPTE_TABLE, | 343 | .mmu_features = MMU_FTRS_POWER5, |
344 | .icache_bsize = 128, | 344 | .icache_bsize = 128, |
345 | .dcache_bsize = 128, | 345 | .dcache_bsize = 128, |
346 | .num_pmcs = 6, | 346 | .num_pmcs = 6, |
@@ -356,7 +356,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
356 | .cpu_name = "POWER5+ (gs)", | 356 | .cpu_name = "POWER5+ (gs)", |
357 | .cpu_features = CPU_FTRS_POWER5, | 357 | .cpu_features = CPU_FTRS_POWER5, |
358 | .cpu_user_features = COMMON_USER_POWER5_PLUS, | 358 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
359 | .mmu_features = MMU_FTR_HPTE_TABLE, | 359 | .mmu_features = MMU_FTRS_POWER5, |
360 | .icache_bsize = 128, | 360 | .icache_bsize = 128, |
361 | .dcache_bsize = 128, | 361 | .dcache_bsize = 128, |
362 | .num_pmcs = 6, | 362 | .num_pmcs = 6, |
@@ -373,7 +373,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
373 | .cpu_name = "POWER5+", | 373 | .cpu_name = "POWER5+", |
374 | .cpu_features = CPU_FTRS_POWER5, | 374 | .cpu_features = CPU_FTRS_POWER5, |
375 | .cpu_user_features = COMMON_USER_POWER5_PLUS, | 375 | .cpu_user_features = COMMON_USER_POWER5_PLUS, |
376 | .mmu_features = MMU_FTR_HPTE_TABLE, | 376 | .mmu_features = MMU_FTRS_POWER5, |
377 | .icache_bsize = 128, | 377 | .icache_bsize = 128, |
378 | .dcache_bsize = 128, | 378 | .dcache_bsize = 128, |
379 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 379 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
@@ -387,7 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
387 | .cpu_features = CPU_FTRS_POWER6, | 387 | .cpu_features = CPU_FTRS_POWER6, |
388 | .cpu_user_features = COMMON_USER_POWER6 | | 388 | .cpu_user_features = COMMON_USER_POWER6 | |
389 | PPC_FEATURE_POWER6_EXT, | 389 | PPC_FEATURE_POWER6_EXT, |
390 | .mmu_features = MMU_FTR_HPTE_TABLE, | 390 | .mmu_features = MMU_FTRS_POWER6, |
391 | .icache_bsize = 128, | 391 | .icache_bsize = 128, |
392 | .dcache_bsize = 128, | 392 | .dcache_bsize = 128, |
393 | .num_pmcs = 6, | 393 | .num_pmcs = 6, |
@@ -406,7 +406,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
406 | .cpu_name = "POWER6 (architected)", | 406 | .cpu_name = "POWER6 (architected)", |
407 | .cpu_features = CPU_FTRS_POWER6, | 407 | .cpu_features = CPU_FTRS_POWER6, |
408 | .cpu_user_features = COMMON_USER_POWER6, | 408 | .cpu_user_features = COMMON_USER_POWER6, |
409 | .mmu_features = MMU_FTR_HPTE_TABLE, | 409 | .mmu_features = MMU_FTRS_POWER6, |
410 | .icache_bsize = 128, | 410 | .icache_bsize = 128, |
411 | .dcache_bsize = 128, | 411 | .dcache_bsize = 128, |
412 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", | 412 | .oprofile_cpu_type = "ppc64/ibm-compat-v1", |
@@ -419,8 +419,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
419 | .cpu_name = "POWER7 (architected)", | 419 | .cpu_name = "POWER7 (architected)", |
420 | .cpu_features = CPU_FTRS_POWER7, | 420 | .cpu_features = CPU_FTRS_POWER7, |
421 | .cpu_user_features = COMMON_USER_POWER7, | 421 | .cpu_user_features = COMMON_USER_POWER7, |
422 | .mmu_features = MMU_FTR_HPTE_TABLE | | 422 | .mmu_features = MMU_FTRS_POWER7, |
423 | MMU_FTR_TLBIE_206, | ||
424 | .icache_bsize = 128, | 423 | .icache_bsize = 128, |
425 | .dcache_bsize = 128, | 424 | .dcache_bsize = 128, |
426 | .oprofile_type = PPC_OPROFILE_POWER4, | 425 | .oprofile_type = PPC_OPROFILE_POWER4, |
@@ -435,8 +434,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
435 | .cpu_name = "POWER7 (raw)", | 434 | .cpu_name = "POWER7 (raw)", |
436 | .cpu_features = CPU_FTRS_POWER7, | 435 | .cpu_features = CPU_FTRS_POWER7, |
437 | .cpu_user_features = COMMON_USER_POWER7, | 436 | .cpu_user_features = COMMON_USER_POWER7, |
438 | .mmu_features = MMU_FTR_HPTE_TABLE | | 437 | .mmu_features = MMU_FTRS_POWER7, |
439 | MMU_FTR_TLBIE_206, | ||
440 | .icache_bsize = 128, | 438 | .icache_bsize = 128, |
441 | .dcache_bsize = 128, | 439 | .dcache_bsize = 128, |
442 | .num_pmcs = 6, | 440 | .num_pmcs = 6, |
@@ -453,8 +451,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
453 | .cpu_name = "POWER7+ (raw)", | 451 | .cpu_name = "POWER7+ (raw)", |
454 | .cpu_features = CPU_FTRS_POWER7, | 452 | .cpu_features = CPU_FTRS_POWER7, |
455 | .cpu_user_features = COMMON_USER_POWER7, | 453 | .cpu_user_features = COMMON_USER_POWER7, |
456 | .mmu_features = MMU_FTR_HPTE_TABLE | | 454 | .mmu_features = MMU_FTRS_POWER7, |
457 | MMU_FTR_TLBIE_206, | ||
458 | .icache_bsize = 128, | 455 | .icache_bsize = 128, |
459 | .dcache_bsize = 128, | 456 | .dcache_bsize = 128, |
460 | .num_pmcs = 6, | 457 | .num_pmcs = 6, |
@@ -473,7 +470,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
473 | .cpu_user_features = COMMON_USER_PPC64 | | 470 | .cpu_user_features = COMMON_USER_PPC64 | |
474 | PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | | 471 | PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | |
475 | PPC_FEATURE_SMT, | 472 | PPC_FEATURE_SMT, |
476 | .mmu_features = MMU_FTR_HPTE_TABLE, | 473 | .mmu_features = MMU_FTRS_CELL, |
477 | .icache_bsize = 128, | 474 | .icache_bsize = 128, |
478 | .dcache_bsize = 128, | 475 | .dcache_bsize = 128, |
479 | .num_pmcs = 4, | 476 | .num_pmcs = 4, |
@@ -488,7 +485,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
488 | .cpu_name = "PA6T", | 485 | .cpu_name = "PA6T", |
489 | .cpu_features = CPU_FTRS_PA6T, | 486 | .cpu_features = CPU_FTRS_PA6T, |
490 | .cpu_user_features = COMMON_USER_PA6T, | 487 | .cpu_user_features = COMMON_USER_PA6T, |
491 | .mmu_features = MMU_FTR_HPTE_TABLE, | 488 | .mmu_features = MMU_FTRS_PA6T, |
492 | .icache_bsize = 64, | 489 | .icache_bsize = 64, |
493 | .dcache_bsize = 64, | 490 | .dcache_bsize = 64, |
494 | .num_pmcs = 6, | 491 | .num_pmcs = 6, |
@@ -505,7 +502,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
505 | .cpu_name = "POWER4 (compatible)", | 502 | .cpu_name = "POWER4 (compatible)", |
506 | .cpu_features = CPU_FTRS_COMPATIBLE, | 503 | .cpu_features = CPU_FTRS_COMPATIBLE, |
507 | .cpu_user_features = COMMON_USER_PPC64, | 504 | .cpu_user_features = COMMON_USER_PPC64, |
508 | .mmu_features = MMU_FTR_HPTE_TABLE, | 505 | .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2, |
509 | .icache_bsize = 128, | 506 | .icache_bsize = 128, |
510 | .dcache_bsize = 128, | 507 | .dcache_bsize = 128, |
511 | .num_pmcs = 6, | 508 | .num_pmcs = 6, |
@@ -2020,11 +2017,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
2020 | .cpu_name = "A2 (>= DD2)", | 2017 | .cpu_name = "A2 (>= DD2)", |
2021 | .cpu_features = CPU_FTRS_A2, | 2018 | .cpu_features = CPU_FTRS_A2, |
2022 | .cpu_user_features = COMMON_USER_PPC64, | 2019 | .cpu_user_features = COMMON_USER_PPC64, |
2023 | .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | | 2020 | .mmu_features = MMU_FTRS_A2, |
2024 | MMU_FTR_USE_TLBIVAX_BCAST | | ||
2025 | MMU_FTR_LOCK_BCAST_INVAL | | ||
2026 | MMU_FTR_USE_TLBRSRV | | ||
2027 | MMU_FTR_USE_PAIRED_MAS, | ||
2028 | .icache_bsize = 64, | 2021 | .icache_bsize = 64, |
2029 | .dcache_bsize = 64, | 2022 | .dcache_bsize = 64, |
2030 | .num_pmcs = 0, | 2023 | .num_pmcs = 0, |