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authorDavid Gibson <david@gibson.dropbear.id.au>2006-01-12 22:56:25 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-13 05:16:23 -0500
commite58c3495e6007af59382540bb21ee941e470d88d (patch)
tree24b559cb768bfa5cf4bdef69f2943b081a1f5afa /arch/powerpc/kernel/cpu_setup_power4.S
parent7e78e5e502d4f220d24c6f738f2fdb078ad33607 (diff)
[PATCH] powerpc: Cleanup LOADADDR etc. asm macros
This patch consolidates the variety of macros used for loading 32 or 64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*). The idea is to make the set of macros consistent across 32 and 64 bit and to make it more obvious which is the appropriate one to use in a given situation. The new macros and their semantics are described in the comments in ppc_asm.h. In the process, we change several places that were unnecessarily using immediate loads on ppc64 to use the GOT/TOC. Likewise we cleanup a couple of places where we were clumsily subtracting PAGE_OFFSET with asm instructions to use assemble-time arithmetic or the toreal() macro instead. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_power4.S')
-rw-r--r--arch/powerpc/kernel/cpu_setup_power4.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S
index cca942fe6115..b61d86e7ceb6 100644
--- a/arch/powerpc/kernel/cpu_setup_power4.S
+++ b/arch/powerpc/kernel/cpu_setup_power4.S
@@ -130,7 +130,7 @@ _GLOBAL(__save_cpu_setup)
130 mfcr r7 130 mfcr r7
131 131
132 /* Get storage ptr */ 132 /* Get storage ptr */
133 LOADADDR(r5,cpu_state_storage) 133 LOAD_REG_IMMEDIATE(r5,cpu_state_storage)
134 134
135 /* We only deal with 970 for now */ 135 /* We only deal with 970 for now */
136 mfspr r0,SPRN_PVR 136 mfspr r0,SPRN_PVR
@@ -164,7 +164,7 @@ _GLOBAL(__restore_cpu_setup)
164 /* Get storage ptr (FIXME when using anton reloc as we 164 /* Get storage ptr (FIXME when using anton reloc as we
165 * are running with translation disabled here 165 * are running with translation disabled here
166 */ 166 */
167 LOADADDR(r5,cpu_state_storage) 167 LOAD_REG_IMMEDIATE(r5,cpu_state_storage)
168 168
169 /* We only deal with 970 for now */ 169 /* We only deal with 970 for now */
170 mfspr r0,SPRN_PVR 170 mfspr r0,SPRN_PVR