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authorPaul Mackerras <paulus@samba.org>2009-06-11 00:54:01 -0400
committerIngo Molnar <mingo@elte.hu>2009-06-11 10:48:37 -0400
commit4da52960fd1ae3ddd14901bc88b608cbeaa4b9a6 (patch)
tree26adb099aeb48c19209bc92fc31bfb7a8cad4aa5 /arch/powerpc/kernel/cacheinfo.c
parent9e350de37ac9607012fcf9c5314a28fbddf8f43c (diff)
perf_counters: powerpc: Add support for POWER7 processors
This adds the back-end for the PMU on POWER7 processors. POWER7 has 4 fully-programmable counters and two fixed-function counters (which do respect the freeze conditions, can generate interrupts, and are writable, unlike PMC5/6 on POWER5+/6). Signed-off-by: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <18992.36329.189378.17992@drongo.ozlabs.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/powerpc/kernel/cacheinfo.c')
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