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authorAnton Blanchard <anton@samba.org>2013-09-22 22:04:46 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-10-11 01:48:35 -0400
commitf626190d27a8525fbb6e3a72831e177c092f8a44 (patch)
tree44d18cad1646a37bb031e676db8bb854c5a6fe07 /arch/powerpc/kernel/align.c
parent5c0484e25ec03243d4c2f2d4416d4a13efc77f6a (diff)
powerpc: Remove open coded byte swap macro in alignment handler
Use swab64/32/16 instead of open coding it. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/align.c')
-rw-r--r--arch/powerpc/kernel/align.c36
1 files changed, 12 insertions, 24 deletions
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index a27ccd5dc6b9..af830dfe98b5 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -54,8 +54,6 @@ struct aligninfo {
54/* DSISR bits reported for a DCBZ instruction: */ 54/* DSISR bits reported for a DCBZ instruction: */
55#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ 55#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */
56 56
57#define SWAP(a, b) (t = (a), (a) = (b), (b) = t)
58
59/* 57/*
60 * The PowerPC stores certain bits of the instruction that caused the 58 * The PowerPC stores certain bits of the instruction that caused the
61 * alignment exception in the DSISR register. This array maps those 59 * alignment exception in the DSISR register. This array maps those
@@ -458,7 +456,7 @@ static struct aligninfo spe_aligninfo[32] = {
458static int emulate_spe(struct pt_regs *regs, unsigned int reg, 456static int emulate_spe(struct pt_regs *regs, unsigned int reg,
459 unsigned int instr) 457 unsigned int instr)
460{ 458{
461 int t, ret; 459 int ret;
462 union { 460 union {
463 u64 ll; 461 u64 ll;
464 u32 w[2]; 462 u32 w[2];
@@ -581,24 +579,18 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg,
581 if (flags & SW) { 579 if (flags & SW) {
582 switch (flags & 0xf0) { 580 switch (flags & 0xf0) {
583 case E8: 581 case E8:
584 SWAP(data.v[0], data.v[7]); 582 data.ll = swab64(data.ll);
585 SWAP(data.v[1], data.v[6]);
586 SWAP(data.v[2], data.v[5]);
587 SWAP(data.v[3], data.v[4]);
588 break; 583 break;
589 case E4: 584 case E4:
590 585 data.w[0] = swab32(data.w[0]);
591 SWAP(data.v[0], data.v[3]); 586 data.w[1] = swab32(data.w[1]);
592 SWAP(data.v[1], data.v[2]);
593 SWAP(data.v[4], data.v[7]);
594 SWAP(data.v[5], data.v[6]);
595 break; 587 break;
596 /* Its half word endian */ 588 /* Its half word endian */
597 default: 589 default:
598 SWAP(data.v[0], data.v[1]); 590 data.h[0] = swab16(data.h[0]);
599 SWAP(data.v[2], data.v[3]); 591 data.h[1] = swab16(data.h[1]);
600 SWAP(data.v[4], data.v[5]); 592 data.h[2] = swab16(data.h[2]);
601 SWAP(data.v[6], data.v[7]); 593 data.h[3] = swab16(data.h[3]);
602 break; 594 break;
603 } 595 }
604 } 596 }
@@ -710,7 +702,7 @@ int fix_alignment(struct pt_regs *regs)
710 unsigned int dsisr; 702 unsigned int dsisr;
711 unsigned char __user *addr; 703 unsigned char __user *addr;
712 unsigned long p, swiz; 704 unsigned long p, swiz;
713 int ret, t; 705 int ret;
714 union { 706 union {
715 u64 ll; 707 u64 ll;
716 double dd; 708 double dd;
@@ -915,17 +907,13 @@ int fix_alignment(struct pt_regs *regs)
915 if (flags & SW) { 907 if (flags & SW) {
916 switch (nb) { 908 switch (nb) {
917 case 8: 909 case 8:
918 SWAP(data.v[0], data.v[7]); 910 data.ll = swab64(data.ll);
919 SWAP(data.v[1], data.v[6]);
920 SWAP(data.v[2], data.v[5]);
921 SWAP(data.v[3], data.v[4]);
922 break; 911 break;
923 case 4: 912 case 4:
924 SWAP(data.v[4], data.v[7]); 913 data.x32.low32 = swab32(data.x32.low32);
925 SWAP(data.v[5], data.v[6]);
926 break; 914 break;
927 case 2: 915 case 2:
928 SWAP(data.v[6], data.v[7]); 916 data.x16.low16 = swab16(data.x16.low16);
929 break; 917 break;
930 } 918 }
931 } 919 }