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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2014-05-12 07:34:06 -0400
committerAlexander Graf <agraf@suse.de>2014-05-30 08:26:25 -0400
commitddca156ae6bafc0c6af61805bfe4b37440448a4c (patch)
treedca98cfc431c64d2b5a5a5b68e6f53df3a27f1c3 /arch/powerpc/kernel/align.c
parent7310f3a5b0ecc7ac8b57e70fe395968cbe0fc40a (diff)
KVM: PPC: BOOK3S: Remove open coded make_dsisr in alignment handler
Use make_dsisr instead of open coding it. This also have the added benefit of handling alignment interrupt on additional instructions. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc/kernel/align.c')
-rw-r--r--arch/powerpc/kernel/align.c34
1 files changed, 1 insertions, 33 deletions
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 94908af308d8..34f55524d456 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -25,14 +25,13 @@
25#include <asm/cputable.h> 25#include <asm/cputable.h>
26#include <asm/emulated_ops.h> 26#include <asm/emulated_ops.h>
27#include <asm/switch_to.h> 27#include <asm/switch_to.h>
28#include <asm/disassemble.h>
28 29
29struct aligninfo { 30struct aligninfo {
30 unsigned char len; 31 unsigned char len;
31 unsigned char flags; 32 unsigned char flags;
32}; 33};
33 34
34#define IS_XFORM(inst) (((inst) >> 26) == 31)
35#define IS_DSFORM(inst) (((inst) >> 26) >= 56)
36 35
37#define INVALID { 0, 0 } 36#define INVALID { 0, 0 }
38 37
@@ -192,37 +191,6 @@ static struct aligninfo aligninfo[128] = {
192}; 191};
193 192
194/* 193/*
195 * Create a DSISR value from the instruction
196 */
197static inline unsigned make_dsisr(unsigned instr)
198{
199 unsigned dsisr;
200
201
202 /* bits 6:15 --> 22:31 */
203 dsisr = (instr & 0x03ff0000) >> 16;
204
205 if (IS_XFORM(instr)) {
206 /* bits 29:30 --> 15:16 */
207 dsisr |= (instr & 0x00000006) << 14;
208 /* bit 25 --> 17 */
209 dsisr |= (instr & 0x00000040) << 8;
210 /* bits 21:24 --> 18:21 */
211 dsisr |= (instr & 0x00000780) << 3;
212 } else {
213 /* bit 5 --> 17 */
214 dsisr |= (instr & 0x04000000) >> 12;
215 /* bits 1: 4 --> 18:21 */
216 dsisr |= (instr & 0x78000000) >> 17;
217 /* bits 30:31 --> 12:13 */
218 if (IS_DSFORM(instr))
219 dsisr |= (instr & 0x00000003) << 18;
220 }
221
222 return dsisr;
223}
224
225/*
226 * The dcbz (data cache block zero) instruction 194 * The dcbz (data cache block zero) instruction
227 * gives an alignment fault if used on non-cacheable 195 * gives an alignment fault if used on non-cacheable
228 * memory. We handle the fault mainly for the 196 * memory. We handle the fault mainly for the