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authorThomas Gleixner <tglx@linutronix.de>2011-02-23 03:21:41 -0500
committerThomas Gleixner <tglx@linutronix.de>2011-02-23 03:21:41 -0500
commit7acdbb3f35f4d08c0c4f7cfa306bc7006b6ba902 (patch)
treec76aeb5996fa8f39b838e9cc41f40f854db01912 /arch/powerpc/include
parent695884fb8acd9857e0e7120ccb2150e30f4b8fef (diff)
parentf5412be599602124d2bdd49947b231dd77c0bf99 (diff)
Merge branch 'linus' into x86/platform
Reason: Import mainline device tree changes on which further patches depend on or conflict. Trivial conflict in: drivers/spi/pxa2xx_spi_pci.c Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/mmu-book3e.h8
-rw-r--r--arch/powerpc/include/asm/page.h2
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 8eaed81ea642..17194fcd4040 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,8 +40,8 @@
40 40
41/* MAS registers bit definitions */ 41/* MAS registers bit definitions */
42 42
43#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) 43#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
44#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) 44#define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000)
45#define MAS0_NV(x) ((x) & 0x00000FFF) 45#define MAS0_NV(x) ((x) & 0x00000FFF)
46#define MAS0_HES 0x00004000 46#define MAS0_HES 0x00004000
47#define MAS0_WQ_ALLWAYS 0x00000000 47#define MAS0_WQ_ALLWAYS 0x00000000
@@ -50,12 +50,12 @@
50 50
51#define MAS1_VALID 0x80000000 51#define MAS1_VALID 0x80000000
52#define MAS1_IPROT 0x40000000 52#define MAS1_IPROT 0x40000000
53#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) 53#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
54#define MAS1_IND 0x00002000 54#define MAS1_IND 0x00002000
55#define MAS1_TS 0x00001000 55#define MAS1_TS 0x00001000
56#define MAS1_TSIZE_MASK 0x00000f80 56#define MAS1_TSIZE_MASK 0x00000f80
57#define MAS1_TSIZE_SHIFT 7 57#define MAS1_TSIZE_SHIFT 7
58#define MAS1_TSIZE(x) ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK) 58#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
59 59
60#define MAS2_EPN 0xFFFFF000 60#define MAS2_EPN 0xFFFFF000
61#define MAS2_X0 0x00000040 61#define MAS2_X0 0x00000040
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 53b64be40eb2..da4b20008541 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -101,7 +101,7 @@ extern phys_addr_t kernstart_addr;
101 101
102#ifdef CONFIG_FLATMEM 102#ifdef CONFIG_FLATMEM
103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) 103#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT)
104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr)) 104#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
105#endif 105#endif
106 106
107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 107#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)