diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-19 20:40:40 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-19 20:40:40 -0400 |
commit | 773d7a09e1a1349a5319ac8665e9c612c6aa27d8 (patch) | |
tree | 3b2272bb3cfcab04ba6459cba116e577278c9392 /arch/powerpc/include | |
parent | 17fad5209e6b55148dbd20156cdaf2c7e67faa40 (diff) | |
parent | b71a107c66ad952c9d35ec046a803efc89a80556 (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (35 commits)
powerpc/5121: make clock debug output more readable
powerpc/5xxx: Add common mpc5xxx_get_bus_frequency() function
powerpc/5200: Update pcm030.dts to add i2c eeprom and delete cruft
powerpc/5200: convert mpc52xx_psc_spi to use cs_control callback
fbdev/xilinxfb: Fix improper casting and tighen up probe path
usb/ps3: Add missing annotations
powerpc: Add memory clobber to mtspr()
powerpc: Fix invalid construct in our CPU selection Kconfig
ps3rom: Use ps3_system_bus_[gs]et_drvdata() instead of direct access
powerpc: Add configurable -Werror for arch/powerpc
of_serial: Add UPF_FIXED_TYPE flag
drivers/hvc: Add missing __devexit_p()
net/ps3: gelic - Add missing annotations
powerpc: Introduce macro spin_event_timeout()
powerpc/warp: Fix ISA_DMA_THRESHOLD default
powerpc/bootwrapper: Custom build options for XPedite52xx targets
powerpc/85xx: Add defconfig for X-ES MPC85xx boards
powerpc/85xx: Add dts files for X-ES MPC85xx boards
powerpc/85xx: Add platform support for X-ES MPC85xx boards
83xx: add support for the kmeter1 board.
...
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/delay.h | 36 | ||||
-rw-r--r-- | arch/powerpc/include/asm/fsl_lbc.h | 4 | ||||
-rw-r--r-- | arch/powerpc/include/asm/mpc52xx.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/mpc5xxx.h (renamed from arch/powerpc/include/asm/mpc512x.h) | 10 | ||||
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 3 | ||||
-rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 2 |
6 files changed, 48 insertions, 9 deletions
diff --git a/arch/powerpc/include/asm/delay.h b/arch/powerpc/include/asm/delay.h index f9200a65c632..1e2eb41fa057 100644 --- a/arch/powerpc/include/asm/delay.h +++ b/arch/powerpc/include/asm/delay.h | |||
@@ -2,8 +2,11 @@ | |||
2 | #define _ASM_POWERPC_DELAY_H | 2 | #define _ASM_POWERPC_DELAY_H |
3 | #ifdef __KERNEL__ | 3 | #ifdef __KERNEL__ |
4 | 4 | ||
5 | #include <asm/time.h> | ||
6 | |||
5 | /* | 7 | /* |
6 | * Copyright 1996, Paul Mackerras. | 8 | * Copyright 1996, Paul Mackerras. |
9 | * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved. | ||
7 | * | 10 | * |
8 | * This program is free software; you can redistribute it and/or | 11 | * This program is free software; you can redistribute it and/or |
9 | * modify it under the terms of the GNU General Public License | 12 | * modify it under the terms of the GNU General Public License |
@@ -30,5 +33,38 @@ extern void udelay(unsigned long usecs); | |||
30 | #define mdelay(n) udelay((n) * 1000) | 33 | #define mdelay(n) udelay((n) * 1000) |
31 | #endif | 34 | #endif |
32 | 35 | ||
36 | /** | ||
37 | * spin_event_timeout - spin until a condition gets true or a timeout elapses | ||
38 | * @condition: a C expression to evalate | ||
39 | * @timeout: timeout, in microseconds | ||
40 | * @delay: the number of microseconds to delay between each evaluation of | ||
41 | * @condition | ||
42 | * | ||
43 | * The process spins until the condition evaluates to true (non-zero) or the | ||
44 | * timeout elapses. The return value of this macro is the value of | ||
45 | * @condition when the loop terminates. This allows you to determine the cause | ||
46 | * of the loop terminates. If the return value is zero, then you know a | ||
47 | * timeout has occurred. | ||
48 | * | ||
49 | * This primary purpose of this macro is to poll on a hardware register | ||
50 | * until a status bit changes. The timeout ensures that the loop still | ||
51 | * terminates even if the bit never changes. The delay is for devices that | ||
52 | * need a delay in between successive reads. | ||
53 | * | ||
54 | * gcc will optimize out the if-statement if @delay is a constant. | ||
55 | */ | ||
56 | #define spin_event_timeout(condition, timeout, delay) \ | ||
57 | ({ \ | ||
58 | typeof(condition) __ret; \ | ||
59 | unsigned long __loops = tb_ticks_per_usec * timeout; \ | ||
60 | unsigned long __start = get_tbl(); \ | ||
61 | while (!(__ret = (condition)) && (tb_ticks_since(__start) <= __loops)) \ | ||
62 | if (delay) \ | ||
63 | udelay(delay); \ | ||
64 | else \ | ||
65 | cpu_relax(); \ | ||
66 | __ret; \ | ||
67 | }) | ||
68 | |||
33 | #endif /* __KERNEL__ */ | 69 | #endif /* __KERNEL__ */ |
34 | #endif /* _ASM_POWERPC_DELAY_H */ | 70 | #endif /* _ASM_POWERPC_DELAY_H */ |
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 63a4f779f531..1b5a21041f9b 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h | |||
@@ -95,8 +95,8 @@ struct fsl_lbc_bank { | |||
95 | }; | 95 | }; |
96 | 96 | ||
97 | struct fsl_lbc_regs { | 97 | struct fsl_lbc_regs { |
98 | struct fsl_lbc_bank bank[8]; | 98 | struct fsl_lbc_bank bank[12]; |
99 | u8 res0[0x28]; | 99 | u8 res0[0x8]; |
100 | __be32 mar; /**< UPM Address Register */ | 100 | __be32 mar; /**< UPM Address Register */ |
101 | u8 res1[0x4]; | 101 | u8 res1[0x4]; |
102 | __be32 mamr; /**< UPMA Mode Register */ | 102 | __be32 mamr; /**< UPMA Mode Register */ |
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 52e049cd9e68..1b4f697abbdd 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #ifndef __ASSEMBLY__ | 16 | #ifndef __ASSEMBLY__ |
17 | #include <asm/types.h> | 17 | #include <asm/types.h> |
18 | #include <asm/prom.h> | 18 | #include <asm/prom.h> |
19 | #include <asm/mpc5xxx.h> | ||
19 | #endif /* __ASSEMBLY__ */ | 20 | #endif /* __ASSEMBLY__ */ |
20 | 21 | ||
21 | #include <linux/suspend.h> | 22 | #include <linux/suspend.h> |
@@ -268,7 +269,6 @@ struct mpc52xx_intr { | |||
268 | #ifndef __ASSEMBLY__ | 269 | #ifndef __ASSEMBLY__ |
269 | 270 | ||
270 | /* mpc52xx_common.c */ | 271 | /* mpc52xx_common.c */ |
271 | extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node); | ||
272 | extern void mpc5200_setup_xlb_arbiter(void); | 272 | extern void mpc5200_setup_xlb_arbiter(void); |
273 | extern void mpc52xx_declare_of_platform_devices(void); | 273 | extern void mpc52xx_declare_of_platform_devices(void); |
274 | extern void mpc52xx_map_common_devices(void); | 274 | extern void mpc52xx_map_common_devices(void); |
diff --git a/arch/powerpc/include/asm/mpc512x.h b/arch/powerpc/include/asm/mpc5xxx.h index c48a1658eeac..5ce9c5fa434a 100644 --- a/arch/powerpc/include/asm/mpc512x.h +++ b/arch/powerpc/include/asm/mpc5xxx.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007 | 4 | * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007 |
5 | * | 5 | * |
6 | * Description: | 6 | * Description: |
7 | * MPC5121 Prototypes and definitions | 7 | * MPC5xxx Prototypes and definitions |
8 | * | 8 | * |
9 | * This is free software; you can redistribute it and/or modify it | 9 | * This is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by | 10 | * under the terms of the GNU General Public License as published by |
@@ -13,10 +13,10 @@ | |||
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #ifndef __ASM_POWERPC_MPC512x_H__ | 16 | #ifndef __ASM_POWERPC_MPC5xxx_H__ |
17 | #define __ASM_POWERPC_MPC512x_H__ | 17 | #define __ASM_POWERPC_MPC5xxx_H__ |
18 | 18 | ||
19 | extern unsigned long mpc512x_find_ips_freq(struct device_node *node); | 19 | extern unsigned long mpc5xxx_get_bus_frequency(struct device_node *node); |
20 | 20 | ||
21 | #endif /* __ASM_POWERPC_MPC512x_H__ */ | 21 | #endif /* __ASM_POWERPC_MPC5xxx_H__ */ |
22 | 22 | ||
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index a3c28e46947c..1170267736d3 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -755,7 +755,8 @@ | |||
755 | #define mfspr(rn) ({unsigned long rval; \ | 755 | #define mfspr(rn) ({unsigned long rval; \ |
756 | asm volatile("mfspr %0," __stringify(rn) \ | 756 | asm volatile("mfspr %0," __stringify(rn) \ |
757 | : "=r" (rval)); rval;}) | 757 | : "=r" (rval)); rval;}) |
758 | #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) | 758 | #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)\ |
759 | : "memory") | ||
759 | 760 | ||
760 | #ifdef __powerpc64__ | 761 | #ifdef __powerpc64__ |
761 | #ifdef CONFIG_PPC_CELL | 762 | #ifdef CONFIG_PPC_CELL |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 601ddbc46002..6bcf364cbb2f 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -389,12 +389,14 @@ | |||
389 | #define ICCR_CACHE 1 /* Cacheable */ | 389 | #define ICCR_CACHE 1 /* Cacheable */ |
390 | 390 | ||
391 | /* Bit definitions for L1CSR0. */ | 391 | /* Bit definitions for L1CSR0. */ |
392 | #define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ | ||
392 | #define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ | 393 | #define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ |
393 | #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ | 394 | #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ |
394 | #define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ | 395 | #define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ |
395 | #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ | 396 | #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ |
396 | 397 | ||
397 | /* Bit definitions for L1CSR1. */ | 398 | /* Bit definitions for L1CSR1. */ |
399 | #define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ | ||
398 | #define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ | 400 | #define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ |
399 | #define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ | 401 | #define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ |
400 | #define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ | 402 | #define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ |