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authorKumar Gala <galak@kernel.crashing.org>2009-09-01 11:48:42 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-09-02 02:20:41 -0400
commit76acc2c1a7a9a8c2cae7e9cf8d0a8b374a48aa94 (patch)
tree3d65ea23c18d4a73ce55724de66ae9eb7eb2358d /arch/powerpc/include
parent1d5d9527d8ed8d87beb22a4fd954366aeabd12c7 (diff)
powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT
Switch to using the Power ISA defined PTE format when we have a 64-bit PTE. This makes the code handling between fsl-booke and book3e-64 similiar for TLB faults. Additionally this lets use take advantage of the page size encodings and full permissions that the HW PTE defines. Also defined _PMD_PRESENT, _PMD_PRESENT_MASK, and _PMD_BAD since the 32-bit ppc arch code expects them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h2
-rw-r--r--arch/powerpc/include/asm/pte-book3e.h3
-rw-r--r--arch/powerpc/include/asm/pte-fsl-booke.h7
3 files changed, 5 insertions, 7 deletions
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index f2c52e253956..55646adfa843 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -111,6 +111,8 @@ extern int icache_44x_need_flush;
111#include <asm/pte-40x.h> 111#include <asm/pte-40x.h>
112#elif defined(CONFIG_44x) 112#elif defined(CONFIG_44x)
113#include <asm/pte-44x.h> 113#include <asm/pte-44x.h>
114#elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)
115#include <asm/pte-book3e.h>
114#elif defined(CONFIG_FSL_BOOKE) 116#elif defined(CONFIG_FSL_BOOKE)
115#include <asm/pte-fsl-booke.h> 117#include <asm/pte-fsl-booke.h>
116#elif defined(CONFIG_8xx) 118#elif defined(CONFIG_8xx)
diff --git a/arch/powerpc/include/asm/pte-book3e.h b/arch/powerpc/include/asm/pte-book3e.h
index b82b9dc91a7d..082d515930a2 100644
--- a/arch/powerpc/include/asm/pte-book3e.h
+++ b/arch/powerpc/include/asm/pte-book3e.h
@@ -75,6 +75,9 @@
75/* On 32-bit, we never clear the top part of the PTE */ 75/* On 32-bit, we never clear the top part of the PTE */
76#ifdef CONFIG_PPC32 76#ifdef CONFIG_PPC32
77#define _PTE_NONE_MASK 0xffffffff00000000ULL 77#define _PTE_NONE_MASK 0xffffffff00000000ULL
78#define _PMD_PRESENT 0
79#define _PMD_PRESENT_MASK (PAGE_MASK)
80#define _PMD_BAD (~PAGE_MASK)
78#endif 81#endif
79 82
80#endif /* __KERNEL__ */ 83#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h
index ce8a9e94ce7f..2c12be5f677a 100644
--- a/arch/powerpc/include/asm/pte-fsl-booke.h
+++ b/arch/powerpc/include/asm/pte-fsl-booke.h
@@ -33,13 +33,6 @@
33#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ 33#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
34#define _PAGE_SPECIAL 0x00800 /* S: Special page */ 34#define _PAGE_SPECIAL 0x00800 /* S: Special page */
35 35
36#ifdef CONFIG_PTE_64BIT
37/* ERPN in a PTE never gets cleared, ignore it */
38#define _PTE_NONE_MASK 0xffffffffffff0000ULL
39/* We extend the size of the PTE flags area when using 64-bit PTEs */
40#define PTE_RPN_SHIFT (PAGE_SHIFT + 8)
41#endif
42
43#define _PMD_PRESENT 0 36#define _PMD_PRESENT 0
44#define _PMD_PRESENT_MASK (PAGE_MASK) 37#define _PMD_PRESENT_MASK (PAGE_MASK)
45#define _PMD_BAD (~PAGE_MASK) 38#define _PMD_BAD (~PAGE_MASK)