powerpc: Separate PACA fields for server CPUs

This patch has no effect other than re-ordering PACA fields on
current server CPUs. It however is a pre-requisite for future
support of BookE 64-bit processors. Various parts of the PACA
struct are now moved under some ifdef's, either the new
CONFIG_PPC_BOOK3S or CONFIG_PPC_STD_MMU_64, whatever seems more
appropriate.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.craashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 9 insertions, 3 deletions

diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 082b3aedf145..0ea1985bdb8b 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -43,6 +43,7 @@ struct task_struct;
  * processor.
  */
 struct paca_struct {
+#ifdef CONFIG_PPC_BOOK3S
         /*
          * Because hw_cpu_id, unlike other paca fields, is accessed
          * routinely from other CPUs (from the IRQ code), we stick to
@@ -51,7 +52,7 @@ struct paca_struct {
          */
 
         struct lppaca *lppaca_ptr;      /* Pointer to LpPaca for PLIC */
-
+#endif /* CONFIG_PPC_BOOK3S */
         /*
          * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c 
          * load lock_token and paca_index with a single lwz
@@ -64,13 +65,16 @@ struct paca_struct {
         u64 kernel_toc;                 /* Kernel TOC address */
         u64 kernelbase;                 /* Base address of kernel */
         u64 kernel_msr;                 /* MSR while running in kernel */
+#ifdef CONFIG_PPC_STD_MMU_64
         u64 stab_real;                  /* Absolute address of segment table */
         u64 stab_addr;                  /* Virtual address of segment table */
+#endif /* CONFIG_PPC_STD_MMU_64 */
         void *emergency_sp;             /* pointer to emergency stack */
         u64 data_offset;                /* per cpu data offset */
         s16 hw_cpu_id;                  /* Physical processor number */
         u8 cpu_start;                   /* At startup, processor spins until */
                                         /* this becomes non-zero. */
+#ifdef CONFIG_PPC_STD_MMU_64
         struct slb_shadow *slb_shadow_ptr;
 
         /*
@@ -81,11 +85,13 @@ struct paca_struct {
         u64 exmc[10];           /* used for machine checks */
         u64 exslb[10];          /* used for SLB/segment table misses
                                  * on the linear mapping */
-
-        mm_context_t context;
+        /* SLB related definitions */
         u16 vmalloc_sllp;
         u16 slb_cache_ptr;
         u16 slb_cache[SLB_CACHE_ENTRIES];
+#endif /* CONFIG_PPC_STD_MMU_64 */
+
+        mm_context_t context;
 
         /*
          * then miscellaneous read-write fields