diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-18 09:31:43 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-18 09:31:43 -0400 |
commit | 0a95d92c0054e74fb79607ac2df958b7bf295706 (patch) | |
tree | e2c5f836e799dcfd72904949be47595af91432e7 /arch/powerpc/include | |
parent | 08351fc6a75731226e1112fc7254542bd3a2912e (diff) | |
parent | 831532035b12a5f7b600515a6f4da0b207b82d6e (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (62 commits)
powerpc/85xx: Fix signedness bug in cache-sram
powerpc/fsl: 85xx: document cache sram bindings
powerpc/fsl: define binding for fsl mpic interrupt controllers
powerpc/fsl_msi: Handle msi-available-ranges better
drivers/serial/ucc_uart.c: Add of_node_put to avoid memory leak
powerpc/85xx: Fix SPE float to integer conversion failure
powerpc/85xx: Update sata controller compatible for p1022ds board
ATA: Add FSL sata v2 controller support
powerpc/mpc8xxx_gpio: simplify searching for 'fsl, qoriq-gpio' compatiable
powerpc/8xx: remove obsolete mgsuvd board
powerpc/82xx: rename and update mgcoge board support
powerpc/83xx: rename and update kmeter1
powerpc/85xx: Workaroudn e500 CPU erratum A005
powerpc/fsl_pci: Add support for FSL PCIe controllers v2.x
powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e
powerpc/pseries: Disable MSI using new interface if possible
powerpc: Enable GENERIC_HARDIRQS_NO_DEPRECATED.
powerpc: core irq_data conversion.
powerpc: sysdev/xilinx_intc irq_data conversion.
powerpc: sysdev/uic irq_data conversion.
...
Fix up conflicts in arch/powerpc/sysdev/fsl_msi.c (due to getting rid of
of_platform_driver in arch/powerpc)
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/cputable.h | 3 | ||||
-rw-r--r-- | arch/powerpc/include/asm/hw_irq.h | 2 | ||||
-rw-r--r-- | arch/powerpc/include/asm/mpic.h | 6 | ||||
-rw-r--r-- | arch/powerpc/include/asm/nvram.h | 3 | ||||
-rw-r--r-- | arch/powerpc/include/asm/pgtable.h | 1 | ||||
-rw-r--r-- | arch/powerpc/include/asm/qe_ic.h | 19 | ||||
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 12 | ||||
-rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 3 |
8 files changed, 33 insertions, 16 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index f0a211d96923..be3cdf9134ce 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -154,6 +154,7 @@ extern const char *powerpc_base_platform; | |||
154 | #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) | 154 | #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) |
155 | #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) | 155 | #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) |
156 | #define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) | 156 | #define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) |
157 | #define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000) | ||
157 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) | 158 | #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) |
158 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) | 159 | #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) |
159 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) | 160 | #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) |
@@ -465,7 +466,7 @@ enum { | |||
465 | CPU_FTRS_44X | CPU_FTRS_440x6 | | 466 | CPU_FTRS_44X | CPU_FTRS_440x6 | |
466 | #endif | 467 | #endif |
467 | #ifdef CONFIG_PPC_47x | 468 | #ifdef CONFIG_PPC_47x |
468 | CPU_FTRS_47X | | 469 | CPU_FTRS_47X | CPU_FTR_476_DD2 | |
469 | #endif | 470 | #endif |
470 | #ifdef CONFIG_E200 | 471 | #ifdef CONFIG_E200 |
471 | CPU_FTRS_E200 | | 472 | CPU_FTRS_E200 | |
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index ff08b70b36d4..bb712c9488b3 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h | |||
@@ -141,6 +141,8 @@ static inline bool arch_irqs_disabled(void) | |||
141 | 141 | ||
142 | #endif /* CONFIG_PPC64 */ | 142 | #endif /* CONFIG_PPC64 */ |
143 | 143 | ||
144 | #define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST | ||
145 | |||
144 | /* | 146 | /* |
145 | * interrupt-retrigger: should we handle this via lost interrupts and IPIs | 147 | * interrupt-retrigger: should we handle this via lost interrupts and IPIs |
146 | * or should we not care like we do now ? --BenH. | 148 | * or should we not care like we do now ? --BenH. |
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index e000cce8f6dd..946ec4947da2 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h | |||
@@ -467,11 +467,11 @@ extern void mpic_request_ipis(void); | |||
467 | void smp_mpic_message_pass(int target, int msg); | 467 | void smp_mpic_message_pass(int target, int msg); |
468 | 468 | ||
469 | /* Unmask a specific virq */ | 469 | /* Unmask a specific virq */ |
470 | extern void mpic_unmask_irq(unsigned int irq); | 470 | extern void mpic_unmask_irq(struct irq_data *d); |
471 | /* Mask a specific virq */ | 471 | /* Mask a specific virq */ |
472 | extern void mpic_mask_irq(unsigned int irq); | 472 | extern void mpic_mask_irq(struct irq_data *d); |
473 | /* EOI a specific virq */ | 473 | /* EOI a specific virq */ |
474 | extern void mpic_end_irq(unsigned int irq); | 474 | extern void mpic_end_irq(struct irq_data *d); |
475 | 475 | ||
476 | /* Fetch interrupt from a given mpic */ | 476 | /* Fetch interrupt from a given mpic */ |
477 | extern unsigned int mpic_get_one_irq(struct mpic *mpic); | 477 | extern unsigned int mpic_get_one_irq(struct mpic *mpic); |
diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h index 92efe67d1c57..9d1aafe607c7 100644 --- a/arch/powerpc/include/asm/nvram.h +++ b/arch/powerpc/include/asm/nvram.h | |||
@@ -51,7 +51,8 @@ static inline int mmio_nvram_init(void) | |||
51 | extern int __init nvram_scan_partitions(void); | 51 | extern int __init nvram_scan_partitions(void); |
52 | extern loff_t nvram_create_partition(const char *name, int sig, | 52 | extern loff_t nvram_create_partition(const char *name, int sig, |
53 | int req_size, int min_size); | 53 | int req_size, int min_size); |
54 | extern int nvram_remove_partition(const char *name, int sig); | 54 | extern int nvram_remove_partition(const char *name, int sig, |
55 | const char *exceptions[]); | ||
55 | extern int nvram_get_partition_size(loff_t data_index); | 56 | extern int nvram_get_partition_size(loff_t data_index); |
56 | extern loff_t nvram_find_partition(const char *name, int sig, int *out_size); | 57 | extern loff_t nvram_find_partition(const char *name, int sig, int *out_size); |
57 | 58 | ||
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index 89f158731ce3..88b0bd925a8b 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h | |||
@@ -170,6 +170,7 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre | |||
170 | #define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \ | 170 | #define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \ |
171 | _PAGE_COHERENT | _PAGE_WRITETHRU)) | 171 | _PAGE_COHERENT | _PAGE_WRITETHRU)) |
172 | 172 | ||
173 | #define pgprot_writecombine pgprot_noncached_wc | ||
173 | 174 | ||
174 | struct file; | 175 | struct file; |
175 | extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | 176 | extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, |
diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h index cf519663a791..9e2cb2019161 100644 --- a/arch/powerpc/include/asm/qe_ic.h +++ b/arch/powerpc/include/asm/qe_ic.h | |||
@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); | |||
81 | static inline void qe_ic_cascade_low_ipic(unsigned int irq, | 81 | static inline void qe_ic_cascade_low_ipic(unsigned int irq, |
82 | struct irq_desc *desc) | 82 | struct irq_desc *desc) |
83 | { | 83 | { |
84 | struct qe_ic *qe_ic = desc->handler_data; | 84 | struct qe_ic *qe_ic = get_irq_desc_data(desc); |
85 | unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); | 85 | unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); |
86 | 86 | ||
87 | if (cascade_irq != NO_IRQ) | 87 | if (cascade_irq != NO_IRQ) |
@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq, | |||
91 | static inline void qe_ic_cascade_high_ipic(unsigned int irq, | 91 | static inline void qe_ic_cascade_high_ipic(unsigned int irq, |
92 | struct irq_desc *desc) | 92 | struct irq_desc *desc) |
93 | { | 93 | { |
94 | struct qe_ic *qe_ic = desc->handler_data; | 94 | struct qe_ic *qe_ic = get_irq_desc_data(desc); |
95 | unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); | 95 | unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); |
96 | 96 | ||
97 | if (cascade_irq != NO_IRQ) | 97 | if (cascade_irq != NO_IRQ) |
@@ -101,32 +101,35 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq, | |||
101 | static inline void qe_ic_cascade_low_mpic(unsigned int irq, | 101 | static inline void qe_ic_cascade_low_mpic(unsigned int irq, |
102 | struct irq_desc *desc) | 102 | struct irq_desc *desc) |
103 | { | 103 | { |
104 | struct qe_ic *qe_ic = desc->handler_data; | 104 | struct qe_ic *qe_ic = get_irq_desc_data(desc); |
105 | unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); | 105 | unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); |
106 | struct irq_chip *chip = get_irq_desc_chip(desc); | ||
106 | 107 | ||
107 | if (cascade_irq != NO_IRQ) | 108 | if (cascade_irq != NO_IRQ) |
108 | generic_handle_irq(cascade_irq); | 109 | generic_handle_irq(cascade_irq); |
109 | 110 | ||
110 | desc->chip->eoi(irq); | 111 | chip->irq_eoi(&desc->irq_data); |
111 | } | 112 | } |
112 | 113 | ||
113 | static inline void qe_ic_cascade_high_mpic(unsigned int irq, | 114 | static inline void qe_ic_cascade_high_mpic(unsigned int irq, |
114 | struct irq_desc *desc) | 115 | struct irq_desc *desc) |
115 | { | 116 | { |
116 | struct qe_ic *qe_ic = desc->handler_data; | 117 | struct qe_ic *qe_ic = get_irq_desc_data(desc); |
117 | unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); | 118 | unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); |
119 | struct irq_chip *chip = get_irq_desc_chip(desc); | ||
118 | 120 | ||
119 | if (cascade_irq != NO_IRQ) | 121 | if (cascade_irq != NO_IRQ) |
120 | generic_handle_irq(cascade_irq); | 122 | generic_handle_irq(cascade_irq); |
121 | 123 | ||
122 | desc->chip->eoi(irq); | 124 | chip->irq_eoi(&desc->irq_data); |
123 | } | 125 | } |
124 | 126 | ||
125 | static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, | 127 | static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, |
126 | struct irq_desc *desc) | 128 | struct irq_desc *desc) |
127 | { | 129 | { |
128 | struct qe_ic *qe_ic = desc->handler_data; | 130 | struct qe_ic *qe_ic = get_irq_desc_data(desc); |
129 | unsigned int cascade_irq; | 131 | unsigned int cascade_irq; |
132 | struct irq_chip *chip = get_irq_desc_chip(desc); | ||
130 | 133 | ||
131 | cascade_irq = qe_ic_get_high_irq(qe_ic); | 134 | cascade_irq = qe_ic_get_high_irq(qe_ic); |
132 | if (cascade_irq == NO_IRQ) | 135 | if (cascade_irq == NO_IRQ) |
@@ -135,7 +138,7 @@ static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, | |||
135 | if (cascade_irq != NO_IRQ) | 138 | if (cascade_irq != NO_IRQ) |
136 | generic_handle_irq(cascade_irq); | 139 | generic_handle_irq(cascade_irq); |
137 | 140 | ||
138 | desc->chip->eoi(irq); | 141 | chip->irq_eoi(&desc->irq_data); |
139 | } | 142 | } |
140 | 143 | ||
141 | #endif /* _ASM_POWERPC_QE_IC_H */ | 144 | #endif /* _ASM_POWERPC_QE_IC_H */ |
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 125fc1ad665d..1bc6a12f3725 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -170,6 +170,16 @@ | |||
170 | #define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ | 170 | #define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ |
171 | 171 | ||
172 | /* Special Purpose Registers (SPRNs)*/ | 172 | /* Special Purpose Registers (SPRNs)*/ |
173 | |||
174 | #ifdef CONFIG_40x | ||
175 | #define SPRN_PID 0x3B1 /* Process ID */ | ||
176 | #else | ||
177 | #define SPRN_PID 0x030 /* Process ID */ | ||
178 | #ifdef CONFIG_BOOKE | ||
179 | #define SPRN_PID0 SPRN_PID/* Process ID Register 0 */ | ||
180 | #endif | ||
181 | #endif | ||
182 | |||
173 | #define SPRN_CTR 0x009 /* Count Register */ | 183 | #define SPRN_CTR 0x009 /* Count Register */ |
174 | #define SPRN_DSCR 0x11 | 184 | #define SPRN_DSCR 0x11 |
175 | #define SPRN_CTRLF 0x088 | 185 | #define SPRN_CTRLF 0x088 |
@@ -852,6 +862,8 @@ | |||
852 | #define PVR_7450 0x80000000 | 862 | #define PVR_7450 0x80000000 |
853 | #define PVR_8540 0x80200000 | 863 | #define PVR_8540 0x80200000 |
854 | #define PVR_8560 0x80200000 | 864 | #define PVR_8560 0x80200000 |
865 | #define PVR_VER_E500V1 0x8020 | ||
866 | #define PVR_VER_E500V2 0x8021 | ||
855 | /* | 867 | /* |
856 | * For the 8xx processors, all of them report the same PVR family for | 868 | * For the 8xx processors, all of them report the same PVR family for |
857 | * the PowerPC core. The various versions of these processors must be | 869 | * the PowerPC core. The various versions of these processors must be |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index e68c69bf741a..86ad8128963a 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -150,8 +150,6 @@ | |||
150 | * or IBM 40x. | 150 | * or IBM 40x. |
151 | */ | 151 | */ |
152 | #ifdef CONFIG_BOOKE | 152 | #ifdef CONFIG_BOOKE |
153 | #define SPRN_PID 0x030 /* Process ID */ | ||
154 | #define SPRN_PID0 SPRN_PID/* Process ID Register 0 */ | ||
155 | #define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */ | 153 | #define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */ |
156 | #define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */ | 154 | #define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */ |
157 | #define SPRN_DEAR 0x03D /* Data Error Address Register */ | 155 | #define SPRN_DEAR 0x03D /* Data Error Address Register */ |
@@ -168,7 +166,6 @@ | |||
168 | #define SPRN_TCR 0x154 /* Timer Control Register */ | 166 | #define SPRN_TCR 0x154 /* Timer Control Register */ |
169 | #endif /* Book E */ | 167 | #endif /* Book E */ |
170 | #ifdef CONFIG_40x | 168 | #ifdef CONFIG_40x |
171 | #define SPRN_PID 0x3B1 /* Process ID */ | ||
172 | #define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ | 169 | #define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ |
173 | #define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ | 170 | #define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ |
174 | #define SPRN_DEAR 0x3D5 /* Data Error Address Register */ | 171 | #define SPRN_DEAR 0x3D5 /* Data Error Address Register */ |