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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-02-18 22:38:23 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2010-02-18 22:38:23 -0500
commit87d31345c0a90ccdf185feed9923ed14764f45dc (patch)
tree2816764e59f93379e0e3843fa0c417aafe02c503 /arch/powerpc/include/asm
parente98efaf303ccbff11522a054d155593d7f2bb41f (diff)
parentd24720a45ad2928f687c6371482cdfba19b74fc5 (diff)
Merge commit 'gcl/next' into next
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/mpc5121.h24
-rw-r--r--arch/powerpc/include/asm/mpc52xx_psc.h4
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
new file mode 100644
index 000000000000..e6a30bb1d16a
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -0,0 +1,24 @@
1/*
2 * MPC5121 Prototypes and definitions
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2.
6 */
7
8#ifndef __ASM_POWERPC_MPC5121_H__
9#define __ASM_POWERPC_MPC5121_H__
10
11/* MPC512x Reset module registers */
12struct mpc512x_reset_module {
13 u32 rcwlr; /* Reset Configuration Word Low Register */
14 u32 rcwhr; /* Reset Configuration Word High Register */
15 u32 reserved1;
16 u32 reserved2;
17 u32 rsr; /* Reset Status Register */
18 u32 rmr; /* Reset Mode Register */
19 u32 rpr; /* Reset Protection Register */
20 u32 rcr; /* Reset Control Register */
21 u32 rcer; /* Reset Control Enable Register */
22};
23
24#endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index fb8412057450..42561f4f032d 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -25,7 +25,11 @@
25#include <asm/types.h> 25#include <asm/types.h>
26 26
27/* Max number of PSCs */ 27/* Max number of PSCs */
28#ifdef CONFIG_PPC_MPC512x
29#define MPC52xx_PSC_MAXNUM 12
30#else
28#define MPC52xx_PSC_MAXNUM 6 31#define MPC52xx_PSC_MAXNUM 6
32#endif
29 33
30/* Programmable Serial Controller (PSC) status register bits */ 34/* Programmable Serial Controller (PSC) status register bits */
31#define MPC52xx_PSC_SR_UNEX_RX 0x0001 35#define MPC52xx_PSC_SR_UNEX_RX 0x0001