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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-04-16 11:16:34 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-04-16 11:16:34 -0400
commit32dc496b47eb31f7a1d115a2708e8ef1d054e1fb (patch)
treeb0ae57b9b55a0277395934ea75de00f8f54d227a /arch/powerpc/include/asm
parent8cd50e8e2b416c7f07b267ab3457c6c25a540ba9 (diff)
parentc5ab660db9a98187667d017bb9425f0c1dc76ac1 (diff)
Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r--arch/powerpc/include/asm/futex.h12
-rw-r--r--arch/powerpc/include/asm/mmu.h6
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h13
3 files changed, 23 insertions, 8 deletions
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 6d406c5c5de4..9696cc36d2dc 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -27,7 +27,7 @@
27 PPC_LONG "1b,4b,2b,4b\n" \ 27 PPC_LONG "1b,4b,2b,4b\n" \
28 ".previous" \ 28 ".previous" \
29 : "=&r" (oldval), "=&r" (ret) \ 29 : "=&r" (oldval), "=&r" (ret) \
30 : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ 30 : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
31 : "cr0", "memory") 31 : "cr0", "memory")
32 32
33static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) 33static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
@@ -47,19 +47,19 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
47 47
48 switch (op) { 48 switch (op) {
49 case FUTEX_OP_SET: 49 case FUTEX_OP_SET:
50 __futex_atomic_op("", ret, oldval, uaddr, oparg); 50 __futex_atomic_op("mr %1,%4\n", ret, oldval, uaddr, oparg);
51 break; 51 break;
52 case FUTEX_OP_ADD: 52 case FUTEX_OP_ADD:
53 __futex_atomic_op("add %1,%0,%1\n", ret, oldval, uaddr, oparg); 53 __futex_atomic_op("add %1,%0,%4\n", ret, oldval, uaddr, oparg);
54 break; 54 break;
55 case FUTEX_OP_OR: 55 case FUTEX_OP_OR:
56 __futex_atomic_op("or %1,%0,%1\n", ret, oldval, uaddr, oparg); 56 __futex_atomic_op("or %1,%0,%4\n", ret, oldval, uaddr, oparg);
57 break; 57 break;
58 case FUTEX_OP_ANDN: 58 case FUTEX_OP_ANDN:
59 __futex_atomic_op("andc %1,%0,%1\n", ret, oldval, uaddr, oparg); 59 __futex_atomic_op("andc %1,%0,%4\n", ret, oldval, uaddr, oparg);
60 break; 60 break;
61 case FUTEX_OP_XOR: 61 case FUTEX_OP_XOR:
62 __futex_atomic_op("xor %1,%0,%1\n", ret, oldval, uaddr, oparg); 62 __futex_atomic_op("xor %1,%0,%4\n", ret, oldval, uaddr, oparg);
63 break; 63 break;
64 default: 64 default:
65 ret = -ENOSYS; 65 ret = -ENOSYS;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index cbf154387091..86d2366ab6a1 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -52,6 +52,12 @@
52 */ 52 */
53#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) 53#define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000)
54 54
55/* This indicates that the processor uses the wrong opcode for tlbilx
56 * instructions. During the ISA 2.06 development the opcode for tlbilx
57 * changed and some early implementations used to old opcode
58 */
59#define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000)
60
55#ifndef __ASSEMBLY__ 61#ifndef __ASSEMBLY__
56#include <asm/cputable.h> 62#include <asm/cputable.h>
57 63
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index f4a4db8d5555..ef4da37f3c10 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -43,7 +43,8 @@
43 43
44#define PPC_INST_STSWI 0x7c0005aa 44#define PPC_INST_STSWI 0x7c0005aa
45#define PPC_INST_STSWX 0x7c00052a 45#define PPC_INST_STSWX 0x7c00052a
46#define PPC_INST_TLBILX 0x7c000626 46#define PPC_INST_TLBILX 0x7c000024
47#define PPC_INST_TLBILX_EARLY 0x7c000626
47#define PPC_INST_WAIT 0x7c00007c 48#define PPC_INST_WAIT 0x7c00007c
48 49
49/* macros to insert fields into opcodes */ 50/* macros to insert fields into opcodes */
@@ -63,10 +64,18 @@
63#define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) 64#define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI)
64#define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) 65#define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI)
65#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ 66#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \
66 __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) 67 __PPC_T_TLB(t) | \
68 __PPC_RA(a) | __PPC_RB(b))
67#define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) 69#define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b)
68#define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) 70#define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b)
69#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) 71#define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b)
72
73#define PPC_TLBILX_EARLY(t, a, b) stringify_in_c(.long PPC_INST_TLBILX_EARLY | \
74 __PPC_T_TLB(t) | \
75 __PPC_RA(a) | __PPC_RB(b))
76#define PPC_TLBILX_ALL_EARLY(a, b) PPC_TLBILX_EARLY(0, a, b)
77#define PPC_TLBILX_PID_EARLY(a, b) PPC_TLBILX_EARLY(1, a, b)
78#define PPC_TLBILX_VA_EARLY(a, b) PPC_TLBILX_EARLY(3, a, b)
70#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ 79#define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \
71 __PPC_WC(w)) 80 __PPC_WC(w))
72 81