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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-08-26 23:13:41 -0400 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-08-26 23:13:41 -0400 |
| commit | 3c2ee2d9f41ef43a581b26b677d2b4054ccbd200 (patch) | |
| tree | f427586e5a1fecd1a21d9f4a5e088f31363f5282 /arch/powerpc/include/asm | |
| parent | 6776426320e151051a16bc7bf86f12d310c9e8ca (diff) | |
| parent | 1dcd8ffc81e80a170625883f63f6a5db3cd0428d (diff) | |
Merge commit 'kumar/next' into next
Diffstat (limited to 'arch/powerpc/include/asm')
| -rw-r--r-- | arch/powerpc/include/asm/mmu-book3e.h | 12 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 6 |
2 files changed, 12 insertions, 6 deletions
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h index d74580469361..74695816205c 100644 --- a/arch/powerpc/include/asm/mmu-book3e.h +++ b/arch/powerpc/include/asm/mmu-book3e.h | |||
| @@ -114,6 +114,18 @@ | |||
| 114 | 114 | ||
| 115 | #define MAS7_RPN 0xFFFFFFFF | 115 | #define MAS7_RPN 0xFFFFFFFF |
| 116 | 116 | ||
| 117 | /* Bit definitions for MMUCSR0 */ | ||
| 118 | #define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */ | ||
| 119 | #define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */ | ||
| 120 | #define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */ | ||
| 121 | #define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */ | ||
| 122 | #define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ | ||
| 123 | MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) | ||
| 124 | #define MMUCSR0_TLB0PS 0x00000780 /* TLB0 Page Size */ | ||
| 125 | #define MMUCSR0_TLB1PS 0x00007800 /* TLB1 Page Size */ | ||
| 126 | #define MMUCSR0_TLB2PS 0x00078000 /* TLB2 Page Size */ | ||
| 127 | #define MMUCSR0_TLB3PS 0x00780000 /* TLB3 Page Size */ | ||
| 128 | |||
| 117 | /* TLBnCFG encoding */ | 129 | /* TLBnCFG encoding */ |
| 118 | #define TLBnCFG_N_ENTRY 0x00000fff /* number of entries */ | 130 | #define TLBnCFG_N_ENTRY 0x00000fff /* number of entries */ |
| 119 | #define TLBnCFG_HES 0x00002000 /* HW select supported */ | 131 | #define TLBnCFG_HES 0x00002000 /* HW select supported */ |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 2c9c706e6448..9bb81d99b765 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
| @@ -430,12 +430,6 @@ | |||
| 430 | #define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ | 430 | #define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ |
| 431 | #define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ | 431 | #define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ |
| 432 | 432 | ||
| 433 | /* Bit definitions for MMUCSR0 */ | ||
| 434 | #define MMUCSR0_TLB1FI 0x00000002 /* TLB1 Flash invalidate */ | ||
| 435 | #define MMUCSR0_TLB0FI 0x00000004 /* TLB0 Flash invalidate */ | ||
| 436 | #define MMUCSR0_TLB2FI 0x00000040 /* TLB2 Flash invalidate */ | ||
| 437 | #define MMUCSR0_TLB3FI 0x00000020 /* TLB3 Flash invalidate */ | ||
| 438 | |||
| 439 | /* Bit definitions for SGR. */ | 433 | /* Bit definitions for SGR. */ |
| 440 | #define SGR_NORMAL 0 /* Speculative fetching allowed. */ | 434 | #define SGR_NORMAL 0 /* Speculative fetching allowed. */ |
| 441 | #define SGR_GUARDED 1 /* Speculative fetching disallowed. */ | 435 | #define SGR_GUARDED 1 /* Speculative fetching disallowed. */ |