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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-04-13 18:32:13 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-04-13 18:32:13 -0400
commita84bd2ee81ea1bdbd238cd1c380ec25f50a876c5 (patch)
treeba054d4b1a20dadec088fd4d8983fb5939227e46 /arch/powerpc/include/asm/uninorth.h
parentaec995900fbc8cffa9f0f9e797ef07a0beb2b079 (diff)
parent7db6a7fa09884b34d2a5d4e6e4ed58664a5f0cf8 (diff)
Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
Diffstat (limited to 'arch/powerpc/include/asm/uninorth.h')
-rw-r--r--arch/powerpc/include/asm/uninorth.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h
index f737732c3861..ae9c899c8a6d 100644
--- a/arch/powerpc/include/asm/uninorth.h
+++ b/arch/powerpc/include/asm/uninorth.h
@@ -60,7 +60,7 @@
60 * 60 *
61 * Obviously, the GART is not cache coherent and so any change to it 61 * Obviously, the GART is not cache coherent and so any change to it
62 * must be flushed to memory (or maybe just make the GART space non 62 * must be flushed to memory (or maybe just make the GART space non
63 * cachable). AGP memory itself doens't seem to be cache coherent neither. 63 * cachable). AGP memory itself does't seem to be cache coherent neither.
64 * 64 *
65 * In order to invalidate the GART (which is probably necessary to inval 65 * In order to invalidate the GART (which is probably necessary to inval
66 * the bridge internal TLBs), the following sequence has to be written, 66 * the bridge internal TLBs), the following sequence has to be written,