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authorMichael Ellerman <mpe@ellerman.id.au>2014-07-09 22:29:19 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-07-28 00:10:22 -0400
commit376af5947c0e441ccbf98f0212d4ffbf171528f6 (patch)
tree8d80f48caea9448257de40a2a9c7279cc80e60b0 /arch/powerpc/include/asm/reg.h
parent468a33028edd62549ad3c4dcbc23dd0311c67832 (diff)
powerpc: Remove STAB code
Old cpus didn't have a Segment Lookaside Buffer (SLB), instead they had a Segment Table (STAB). Now that we've dropped support for those cpus, we can remove the STAB support entirely. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r--arch/powerpc/include/asm/reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index bffd89d27301..f7b97b895708 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -254,7 +254,7 @@
254#define DSISR_PROTFAULT 0x08000000 /* protection fault */ 254#define DSISR_PROTFAULT 0x08000000 /* protection fault */
255#define DSISR_ISSTORE 0x02000000 /* access was a store */ 255#define DSISR_ISSTORE 0x02000000 /* access was a store */
256#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ 256#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
257#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ 257#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */
258#define DSISR_KEYFAULT 0x00200000 /* Key fault */ 258#define DSISR_KEYFAULT 0x00200000 /* Key fault */
259#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ 259#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
260#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ 260#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */