powerpc: Correct FSCR bit definitions

Commit 74e400cee6 ("powerpc: Rework setting up H/FSCR bit definitions")
ended up with incorrect bit numbers for FSCR_PM_LG and FSCR_BHRB_LG.
This fixes them.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index dc10bf549635..10d1ef016bf1 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -258,8 +258,8 @@
 #define FSCR_TAR_LG     8       /* Enable Target Address Register */
 #define FSCR_EBB_LG     7       /* Enable Event Based Branching */
 #define FSCR_TM_LG      5       /* Enable Transactional Memory */
-#define FSCR_PM_LG      4       /* Enable prob/priv access to PMU SPRs */
-#define FSCR_BHRB_LG    3       /* Enable Branch History Rolling Buffer*/
+#define FSCR_BHRB_LG    4       /* Enable Branch History Rolling Buffer*/
+#define FSCR_PM_LG      3       /* Enable prob/priv access to PMU SPRs */
 #define FSCR_DSCR_LG    2       /* Enable Data Stream Control Register */
 #define FSCR_VECVSX_LG  1       /* Enable VMX/VSX  */
 #define FSCR_FP_LG      0       /* Enable Floating Point */