diff options
author | Michael Neuling <mikey@neuling.org> | 2012-06-25 09:33:12 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-10 05:17:58 -0400 |
commit | 9a13a524ba37b6634a9b2bb08f3021f161b83513 (patch) | |
tree | a4140d2cff34e330efe3121ff84c0996402ac785 /arch/powerpc/include/asm/ppc_asm.h | |
parent | c75df6f96c59beed8632e3aced5fb4faabaa6c5b (diff) |
powerpc: Convert to %r for all GPR usage
Now all the fixes are in place, let's rock-n-roll!
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/ppc_asm.h')
-rw-r--r-- | arch/powerpc/include/asm/ppc_asm.h | 74 |
1 files changed, 40 insertions, 34 deletions
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 19205f5cbaca..f6f67db212a7 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h | |||
@@ -490,40 +490,46 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601) | |||
490 | #define cr7 7 | 490 | #define cr7 7 |
491 | 491 | ||
492 | 492 | ||
493 | /* General Purpose Registers (GPRs) */ | 493 | /* |
494 | 494 | * General Purpose Registers (GPRs) | |
495 | #define r0 0 | 495 | * |
496 | #define r1 1 | 496 | * The lower case r0-r31 should be used in preference to the upper |
497 | #define r2 2 | 497 | * case R0-R31 as they provide more error checking in the assembler. |
498 | #define r3 3 | 498 | * Use R0-31 only when really nessesary. |
499 | #define r4 4 | 499 | */ |
500 | #define r5 5 | 500 | |
501 | #define r6 6 | 501 | #define r0 %r0 |
502 | #define r7 7 | 502 | #define r1 %r1 |
503 | #define r8 8 | 503 | #define r2 %r2 |
504 | #define r9 9 | 504 | #define r3 %r3 |
505 | #define r10 10 | 505 | #define r4 %r4 |
506 | #define r11 11 | 506 | #define r5 %r5 |
507 | #define r12 12 | 507 | #define r6 %r6 |
508 | #define r13 13 | 508 | #define r7 %r7 |
509 | #define r14 14 | 509 | #define r8 %r8 |
510 | #define r15 15 | 510 | #define r9 %r9 |
511 | #define r16 16 | 511 | #define r10 %r10 |
512 | #define r17 17 | 512 | #define r11 %r11 |
513 | #define r18 18 | 513 | #define r12 %r12 |
514 | #define r19 19 | 514 | #define r13 %r13 |
515 | #define r20 20 | 515 | #define r14 %r14 |
516 | #define r21 21 | 516 | #define r15 %r15 |
517 | #define r22 22 | 517 | #define r16 %r16 |
518 | #define r23 23 | 518 | #define r17 %r17 |
519 | #define r24 24 | 519 | #define r18 %r18 |
520 | #define r25 25 | 520 | #define r19 %r19 |
521 | #define r26 26 | 521 | #define r20 %r20 |
522 | #define r27 27 | 522 | #define r21 %r21 |
523 | #define r28 28 | 523 | #define r22 %r22 |
524 | #define r29 29 | 524 | #define r23 %r23 |
525 | #define r30 30 | 525 | #define r24 %r24 |
526 | #define r31 31 | 526 | #define r25 %r25 |
527 | #define r26 %r26 | ||
528 | #define r27 %r27 | ||
529 | #define r28 %r28 | ||
530 | #define r29 %r29 | ||
531 | #define r30 %r30 | ||
532 | #define r31 %r31 | ||
527 | 533 | ||
528 | 534 | ||
529 | /* Floating Point Registers (FPRs) */ | 535 | /* Floating Point Registers (FPRs) */ |