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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-19 15:34:09 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-03-23 22:47:33 -0400
commit71087002cf807e25056dba4e4028a9f204dc9ffd (patch)
tree60b64edb2c79b3183bb8187a3492994a72453b94 /arch/powerpc/include/asm/pgtable-ppc32.h
parent8d1cf34e7ad5c7738ce20d20bd7f002f562cb8b5 (diff)
powerpc/mm: Merge various PTE bits and accessors definitions
Now that they are almost identical, we can merge some of the definitions related to the PTE format into common files. This creates a new pte-common.h which is included by both 32 and 64-bit right after the CPU specific pte-*.h file, and which defines some bits to "default" values if they haven't been defined already, and then provides a generic definition of most of the bit combinations based on these and exposed to the rest of the kernel. I also moved to the common pgtable.h most of the "small" accessors to the PTE bits and modification helpers (pte_mk*). The actual accessors remain in their separate files. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/pgtable-ppc32.h')
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h204
1 files changed, 2 insertions, 202 deletions
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 7ce331e51f90..ba45c997830f 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -97,174 +97,11 @@ extern int icache_44x_need_flush;
97#include <asm/pte-hash32.h> 97#include <asm/pte-hash32.h>
98#endif 98#endif
99 99
100/* If _PAGE_SPECIAL is defined, then we advertise our support for it */ 100/* And here we include common definitions */
101#ifdef _PAGE_SPECIAL 101#include <asm/pte-common.h>
102#define __HAVE_ARCH_PTE_SPECIAL
103#endif
104
105/*
106 * Some bits are only used on some cpu families... Make sure that all
107 * the undefined gets defined as 0
108 */
109#ifndef _PAGE_HASHPTE
110#define _PAGE_HASHPTE 0
111#endif
112#ifndef _PTE_NONE_MASK
113#define _PTE_NONE_MASK 0
114#endif
115#ifndef _PAGE_SHARED
116#define _PAGE_SHARED 0
117#endif
118#ifndef _PAGE_HWWRITE
119#define _PAGE_HWWRITE 0
120#endif
121#ifndef _PAGE_HWEXEC
122#define _PAGE_HWEXEC 0
123#endif
124#ifndef _PAGE_EXEC
125#define _PAGE_EXEC 0
126#endif
127#ifndef _PAGE_ENDIAN
128#define _PAGE_ENDIAN 0
129#endif
130#ifndef _PAGE_COHERENT
131#define _PAGE_COHERENT 0
132#endif
133#ifndef _PAGE_WRITETHRU
134#define _PAGE_WRITETHRU 0
135#endif
136#ifndef _PAGE_SPECIAL
137#define _PAGE_SPECIAL 0
138#endif
139#ifndef _PMD_PRESENT_MASK
140#define _PMD_PRESENT_MASK _PMD_PRESENT
141#endif
142#ifndef _PMD_SIZE
143#define _PMD_SIZE 0
144#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
145#endif
146
147#ifndef _PAGE_KERNEL_RO
148#define _PAGE_KERNEL_RO 0
149#endif
150#ifndef _PAGE_KERNEL_RW
151#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
152#endif
153
154#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
155
156/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT
157 * here (ie, naturally aligned). Platform who don't just pre-define the
158 * value so we don't override it here
159 */
160#ifndef PTE_RPN_SHIFT
161#define PTE_RPN_SHIFT (PAGE_SHIFT)
162#endif
163
164#ifdef CONFIG_PTE_64BIT
165#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
166#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
167#else
168#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
169#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
170#endif
171
172/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
173 * pgprot changes
174 */
175#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
176 _PAGE_ACCESSED | _PAGE_SPECIAL)
177
178/* Mask of bits returned by pte_pgprot() */
179#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
180 _PAGE_WRITETHRU | _PAGE_ENDIAN | \
181 _PAGE_USER | _PAGE_ACCESSED | \
182 _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
183 _PAGE_EXEC | _PAGE_HWEXEC)
184
185/*
186 * We define 2 sets of base prot bits, one for basic pages (ie,
187 * cacheable kernel and user pages) and one for non cacheable
188 * pages. We always set _PAGE_COHERENT when SMP is enabled or
189 * the processor might need it for DMA coherency.
190 */
191#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
192#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
193#else
194#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
195#endif
196#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
197
198/* Permission masks used for kernel mappings */
199#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
200#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
201 _PAGE_NO_CACHE)
202#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
203 _PAGE_NO_CACHE | _PAGE_GUARDED)
204#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
205#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
206#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
207
208#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
209 defined(CONFIG_KPROBES)
210/* We want the debuggers to be able to set breakpoints anywhere, so
211 * don't write protect the kernel text */
212#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
213#else
214#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
215#endif
216
217#define PAGE_NONE __pgprot(_PAGE_BASE)
218#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
219#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
220#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
221#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
222#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
223#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
224
225/*
226 * The PowerPC can only do execute protection on a segment (256MB) basis,
227 * not on a page basis. So we consider execute permission the same as read.
228 * Also, write permissions imply read permissions.
229 * This is the closest we can get..
230 */
231#define __P000 PAGE_NONE
232#define __P001 PAGE_READONLY_X
233#define __P010 PAGE_COPY
234#define __P011 PAGE_COPY_X
235#define __P100 PAGE_READONLY
236#define __P101 PAGE_READONLY_X
237#define __P110 PAGE_COPY
238#define __P111 PAGE_COPY_X
239
240#define __S000 PAGE_NONE
241#define __S001 PAGE_READONLY_X
242#define __S010 PAGE_SHARED
243#define __S011 PAGE_SHARED_X
244#define __S100 PAGE_READONLY
245#define __S101 PAGE_READONLY_X
246#define __S110 PAGE_SHARED
247#define __S111 PAGE_SHARED_X
248 102
249#ifndef __ASSEMBLY__ 103#ifndef __ASSEMBLY__
250/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
251 * kernel without large page PMD support */
252extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
253 104
254/*
255 * Conversions between PTE values and page frame numbers.
256 */
257
258#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
259#define pte_page(x) pfn_to_page(pte_pfn(x))
260
261#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
262 pgprot_val(prot))
263#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
264#endif /* __ASSEMBLY__ */
265
266#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
267#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
268#define pte_clear(mm, addr, ptep) \ 105#define pte_clear(mm, addr, ptep) \
269 do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0) 106 do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
270 107
@@ -273,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
273#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK) 110#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
274#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0) 111#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
275 112
276#ifndef __ASSEMBLY__
277/*
278 * The following only work if pte_present() is true.
279 * Undefined behaviour if not..
280 */
281static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
282static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
283static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
284static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
285static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
286
287static inline pte_t pte_wrprotect(pte_t pte) {
288 pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
289static inline pte_t pte_mkclean(pte_t pte) {
290 pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
291static inline pte_t pte_mkold(pte_t pte) {
292 pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
293
294static inline pte_t pte_mkwrite(pte_t pte) {
295 pte_val(pte) |= _PAGE_RW; return pte; }
296static inline pte_t pte_mkdirty(pte_t pte) {
297 pte_val(pte) |= _PAGE_DIRTY; return pte; }
298static inline pte_t pte_mkyoung(pte_t pte) {
299 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
300static inline pte_t pte_mkspecial(pte_t pte) {
301 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
302static inline pgprot_t pte_pgprot(pte_t pte)
303{
304 return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
305}
306
307static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
308{
309 pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
310 return pte;
311}
312
313/* 113/*
314 * When flushing the tlb entry for a page, we also need to flush the hash 114 * When flushing the tlb entry for a page, we also need to flush the hash
315 * table entry. flush_hash_pages is assembler (for speed) in hashtable.S. 115 * table entry. flush_hash_pages is assembler (for speed) in hashtable.S.