powerpc/mpic: finish supporting timer group B on Freescale chips

Previously, these interrupts would be mapped, but the offset calculation
was broken, and only the first group was initialized.

Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 5 insertions, 0 deletions

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c9f698a994be..e14d35d572af 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -63,6 +63,7 @@
  */
 #define MPIC_TIMER_BASE                 0x01100
 #define MPIC_TIMER_STRIDE               0x40
+#define MPIC_TIMER_GROUP_STRIDE         0x1000
 
 #define MPIC_TIMER_CURRENT_CNT          0x00000
 #define MPIC_TIMER_BASE_CNT             0x00010
@@ -110,6 +111,9 @@
 #define         MPIC_VECPRI_SENSE_MASK                  0x00400000
 #define MPIC_IRQ_DESTINATION            0x00010
 
+#define MPIC_FSL_BRR1                   0x00000
+#define         MPIC_FSL_BRR1_VER                       0x0000ffff
+
 #define MPIC_MAX_IRQ_SOURCES    2048
 #define MPIC_MAX_CPUS           32
 #define MPIC_MAX_ISU            32
@@ -296,6 +300,7 @@ struct mpic
         phys_addr_t paddr;
 
         /* The various ioremap'ed bases */
+        struct mpic_reg_bank    thiscpuregs;
         struct mpic_reg_bank    gregs;
         struct mpic_reg_bank    tmregs;
         struct mpic_reg_bank    cpuregs[MPIC_MAX_CPUS];