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authorKumar Gala <galak@kernel.crashing.org>2009-02-10 23:26:06 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-03-09 10:25:38 -0400
commitc3071951d0acd33b5c3f820fb5eaa3a9c2a8f212 (patch)
treed52a9b1142c7d0f753f497f611f05cccbc12950f /arch/powerpc/include/asm/mmu.h
parentc026c98739c7e435440e76cbcd96e0f8ebeeada0 (diff)
powerpc/fsl-booke: Add support for tlbilx instructions
The e500mc core supports the new tlbilx instructions that do core local invalidates and also provide us the ability to take down all TLB entries matching a given PID. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 5c78079cfa3c..dc82dcd06aea 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -36,9 +36,9 @@
36 */ 36 */
37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) 37#define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000)
38 38
39/* Enable use of tlbilx invalidate-by-PID variant. 39/* Enable use of tlbilx invalidate instructions.
40 */ 40 */
41#define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000) 41#define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000)
42 42
43/* This indicates that the processor cannot handle multiple outstanding 43/* This indicates that the processor cannot handle multiple outstanding
44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock 44 * broadcast tlbivax or tlbsync. This makes the code use a spinlock