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authorKumar Gala <galak@kernel.crashing.org>2009-02-10 19:10:50 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-02-12 17:37:11 -0500
commitd66c82ea456853a71d88359b0c19a92ac1d393ff (patch)
tree13346439fc4f4186c096ae19387934c0d1dd3841 /arch/powerpc/include/asm/mmu-fsl-booke.h
parenta2404746f13b9df2cc6ee48010e921b9efdbba74 (diff)
powerpc/fsl-booke: Add new ISA 2.06 page sizes and MAS defines
The Power ISA 2.06 added power of two page sizes to the embedded MMU architecture. Its done it such a way to be code compatiable with the existing HW. Made the minor code changes to support both power of two and power of four page sizes. Also added some new MAS bits and macros that are defined as part of the 2.06 ISA. Renamed some things to use the 'Book-3e' concept to convey the new MMU that is based on the Freescale Book-E MMU programming model. Note, its still invalid to try and use a page size that isn't supported by cpu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/mmu-fsl-booke.h')
-rw-r--r--arch/powerpc/include/asm/mmu-fsl-booke.h66
1 files changed, 42 insertions, 24 deletions
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-fsl-booke.h
index 3f941c0f7e8e..c5363c3a7207 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-fsl-booke.h
@@ -1,26 +1,42 @@
1#ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ 1#ifndef _ASM_POWERPC_MMU_BOOK3E_H_
2#define _ASM_POWERPC_MMU_FSL_BOOKE_H_ 2#define _ASM_POWERPC_MMU_BOOK3E_H_
3/* 3/*
4 * Freescale Book-E MMU support 4 * Freescale Book-E/Book-3e (ISA 2.06+) MMU support
5 */ 5 */
6 6
7/* Book-E defined page sizes */ 7/* Book-3e defined page sizes */
8#define BOOKE_PAGESZ_1K 0 8#define BOOK3E_PAGESZ_1K 0
9#define BOOKE_PAGESZ_4K 1 9#define BOOK3E_PAGESZ_2K 1
10#define BOOKE_PAGESZ_16K 2 10#define BOOK3E_PAGESZ_4K 2
11#define BOOKE_PAGESZ_64K 3 11#define BOOK3E_PAGESZ_8K 3
12#define BOOKE_PAGESZ_256K 4 12#define BOOK3E_PAGESZ_16K 4
13#define BOOKE_PAGESZ_1M 5 13#define BOOK3E_PAGESZ_32K 5
14#define BOOKE_PAGESZ_4M 6 14#define BOOK3E_PAGESZ_64K 6
15#define BOOKE_PAGESZ_16M 7 15#define BOOK3E_PAGESZ_128K 7
16#define BOOKE_PAGESZ_64M 8 16#define BOOK3E_PAGESZ_256K 8
17#define BOOKE_PAGESZ_256M 9 17#define BOOK3E_PAGESZ_512K 9
18#define BOOKE_PAGESZ_1GB 10 18#define BOOK3E_PAGESZ_1M 10
19#define BOOKE_PAGESZ_4GB 11 19#define BOOK3E_PAGESZ_2M 11
20#define BOOKE_PAGESZ_16GB 12 20#define BOOK3E_PAGESZ_4M 12
21#define BOOKE_PAGESZ_64GB 13 21#define BOOK3E_PAGESZ_8M 13
22#define BOOKE_PAGESZ_256GB 14 22#define BOOK3E_PAGESZ_16M 14
23#define BOOKE_PAGESZ_1TB 15 23#define BOOK3E_PAGESZ_32M 15
24#define BOOK3E_PAGESZ_64M 16
25#define BOOK3E_PAGESZ_128M 17
26#define BOOK3E_PAGESZ_256M 18
27#define BOOK3E_PAGESZ_512M 19
28#define BOOK3E_PAGESZ_1GB 20
29#define BOOK3E_PAGESZ_2GB 21
30#define BOOK3E_PAGESZ_4GB 22
31#define BOOK3E_PAGESZ_8GB 23
32#define BOOK3E_PAGESZ_16GB 24
33#define BOOK3E_PAGESZ_32GB 25
34#define BOOK3E_PAGESZ_64GB 26
35#define BOOK3E_PAGESZ_128GB 27
36#define BOOK3E_PAGESZ_256GB 28
37#define BOOK3E_PAGESZ_512GB 29
38#define BOOK3E_PAGESZ_1TB 30
39#define BOOK3E_PAGESZ_2TB 31
24 40
25#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) 41#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
26#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) 42#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
@@ -29,8 +45,9 @@
29#define MAS1_VALID 0x80000000 45#define MAS1_VALID 0x80000000
30#define MAS1_IPROT 0x40000000 46#define MAS1_IPROT 0x40000000
31#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) 47#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
48#define MAS1_IND 0x00002000
32#define MAS1_TS 0x00001000 49#define MAS1_TS 0x00001000
33#define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) 50#define MAS1_TSIZE(x) ((x << 7) & 0x00000F80)
34 51
35#define MAS2_EPN 0xFFFFF000 52#define MAS2_EPN 0xFFFFF000
36#define MAS2_X0 0x00000040 53#define MAS2_X0 0x00000040
@@ -40,7 +57,7 @@
40#define MAS2_M 0x00000004 57#define MAS2_M 0x00000004
41#define MAS2_G 0x00000002 58#define MAS2_G 0x00000002
42#define MAS2_E 0x00000001 59#define MAS2_E 0x00000001
43#define MAS2_EPN_MASK(size) (~0 << (2*(size) + 10)) 60#define MAS2_EPN_MASK(size) (~0 << (size + 10))
44#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags)) 61#define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags))
45 62
46#define MAS3_RPN 0xFFFFF000 63#define MAS3_RPN 0xFFFFF000
@@ -56,7 +73,7 @@
56#define MAS3_SR 0x00000001 73#define MAS3_SR 0x00000001
57 74
58#define MAS4_TLBSELD(x) MAS0_TLBSEL(x) 75#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
59#define MAS4_TIDDSEL 0x000F0000 76#define MAS4_INDD 0x00008000
60#define MAS4_TSIZED(x) MAS1_TSIZE(x) 77#define MAS4_TSIZED(x) MAS1_TSIZE(x)
61#define MAS4_X0D 0x00000040 78#define MAS4_X0D 0x00000040
62#define MAS4_X1D 0x00000020 79#define MAS4_X1D 0x00000020
@@ -68,6 +85,7 @@
68 85
69#define MAS6_SPID0 0x3FFF0000 86#define MAS6_SPID0 0x3FFF0000
70#define MAS6_SPID1 0x00007FFE 87#define MAS6_SPID1 0x00007FFE
88#define MAS6_ISIZE(x) MAS1_TSIZE(x)
71#define MAS6_SAS 0x00000001 89#define MAS6_SAS 0x00000001
72#define MAS6_SPID MAS6_SPID0 90#define MAS6_SPID MAS6_SPID0
73 91
@@ -82,4 +100,4 @@ typedef struct {
82} mm_context_t; 100} mm_context_t;
83#endif /* !__ASSEMBLY__ */ 101#endif /* !__ASSEMBLY__ */
84 102
85#endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ 103#endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */