diff options
author | LEROY Christophe <christophe.leroy@c-s.fr> | 2014-09-19 04:36:09 -0400 |
---|---|---|
committer | Scott Wood <scottwood@freescale.com> | 2014-11-07 19:10:42 -0500 |
commit | 959d6173b5cccceff47cc2d25feeaac2f96df0e0 (patch) | |
tree | 7cbd7b7d440a3849967da97ccf0c738a3adf15b2 /arch/powerpc/include/asm/mmu-8xx.h | |
parent | ac21951fa8a356e2aab6e93a61aa99b561100e67 (diff) |
powerpc/8xx: Implement 16k pages
This patch activates the handling of 16k pages on the MPC8xx.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/mmu-8xx.h')
-rw-r--r-- | arch/powerpc/include/asm/mmu-8xx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mmu-8xx.h b/arch/powerpc/include/asm/mmu-8xx.h index 3d11d3ce79ec..986b9e1e1044 100644 --- a/arch/powerpc/include/asm/mmu-8xx.h +++ b/arch/powerpc/include/asm/mmu-8xx.h | |||
@@ -56,6 +56,7 @@ | |||
56 | * additional information from the MI_EPN, and MI_TWC registers. | 56 | * additional information from the MI_EPN, and MI_TWC registers. |
57 | */ | 57 | */ |
58 | #define SPRN_MI_RPN 790 | 58 | #define SPRN_MI_RPN 790 |
59 | #define MI_SPS16K 0x00000008 /* Small page size (0 = 4k, 1 = 16k) */ | ||
59 | 60 | ||
60 | /* Define an RPN value for mapping kernel memory to large virtual | 61 | /* Define an RPN value for mapping kernel memory to large virtual |
61 | * pages for boot initialization. This has real page number of 0, | 62 | * pages for boot initialization. This has real page number of 0, |
@@ -129,6 +130,7 @@ | |||
129 | * additional information from the MD_EPN, and MD_TWC registers. | 130 | * additional information from the MD_EPN, and MD_TWC registers. |
130 | */ | 131 | */ |
131 | #define SPRN_MD_RPN 798 | 132 | #define SPRN_MD_RPN 798 |
133 | #define MD_SPS16K 0x00000008 /* Small page size (0 = 4k, 1 = 16k) */ | ||
132 | 134 | ||
133 | /* This is a temporary storage register that could be used to save | 135 | /* This is a temporary storage register that could be used to save |
134 | * a processor working register during a tablewalk. | 136 | * a processor working register during a tablewalk. |