powerpc/book3s: Decode and save machine check event.

Now that we handle machine check in linux, the MCE decoding should also
take place in linux host. This info is crucial to log before we go down
in case we can not handle the machine check errors. This patch decodes
and populates a machine check event which contain high level meaning full
MCE information.

We do this in real mode C code with ME bit on. The MCE information is still
available on emergency stack (in pt_regs structure format). Even if we take
another exception at this point the MCE early handler will allocate a new
stack frame on top of current one. So when we return back here we still have
our MCE information safe on current stack.

We use per cpu buffer to save high level MCE information. Each per cpu buffer
is an array of machine check event structure indexed by per cpu counter
mce_nest_count. The mce_nest_count is incremented every time we enter
machine check early handler in real mode to get the current free slot
(index = mce_nest_count - 1). The mce_nest_count is decremented once the
MCE info is consumed by virtual mode machine exception handler.

This patch provides save_mce_event(), get_mce_event() and release_mce_event()
generic routines that can be used by machine check handlers to populate and
retrieve the event. The routine release_mce_event() will free the event slot so
that it can be reused. Caller can invoke get_mce_event() with a release flag
either to release the event slot immediately OR keep it so that it can be
fetched again. The event slot can be also released anytime by invoking
release_mce_event().

This patch also updates kvm code to invoke get_mce_event to retrieve generic
mce event rather than paca->opal_mce_evt.

The KVM code always calls get_mce_event() with release flags set to false so
that event is available for linus host machine

If machine check occurs while we are in guest, KVM tries to handle the error.
If KVM is able to handle MC error successfully, it enters the guest and
delivers the machine check to guest. If KVM is not able to handle MC error, it
exists the guest and passes the control to linux host machine check handler
which then logs MC event and decides how to handle it in linux host. In failure
case, KVM needs to make sure that the MC event is available for linux host to
consume. Hence KVM always calls get_mce_event() with release flags set to false
and later it invokes release_mce_event() only if it succeeds to handle error.

Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 124 insertions, 0 deletions

diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h
index e3ffa825b970..87cad2a808c2 100644
--- a/arch/powerpc/include/asm/mce.h
+++ b/arch/powerpc/include/asm/mce.h
@@ -66,5 +66,129 @@
 
 #define P8_DSISR_MC_SLB_ERRORS          (P7_DSISR_MC_SLB_ERRORS | \
                                          P8_DSISR_MC_ERAT_MULTIHIT_SEC)
+enum MCE_Version {
+        MCE_V1 = 1,
+};
+
+enum MCE_Severity {
+        MCE_SEV_NO_ERROR = 0,
+        MCE_SEV_WARNING = 1,
+        MCE_SEV_ERROR_SYNC = 2,
+        MCE_SEV_FATAL = 3,
+};
+
+enum MCE_Disposition {
+        MCE_DISPOSITION_RECOVERED = 0,
+        MCE_DISPOSITION_NOT_RECOVERED = 1,
+};
+
+enum MCE_Initiator {
+        MCE_INITIATOR_UNKNOWN = 0,
+        MCE_INITIATOR_CPU = 1,
+};
+
+enum MCE_ErrorType {
+        MCE_ERROR_TYPE_UNKNOWN = 0,
+        MCE_ERROR_TYPE_UE = 1,
+        MCE_ERROR_TYPE_SLB = 2,
+        MCE_ERROR_TYPE_ERAT = 3,
+        MCE_ERROR_TYPE_TLB = 4,
+};
+
+enum MCE_UeErrorType {
+        MCE_UE_ERROR_INDETERMINATE = 0,
+        MCE_UE_ERROR_IFETCH = 1,
+        MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2,
+        MCE_UE_ERROR_LOAD_STORE = 3,
+        MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4,
+};
+
+enum MCE_SlbErrorType {
+        MCE_SLB_ERROR_INDETERMINATE = 0,
+        MCE_SLB_ERROR_PARITY = 1,
+        MCE_SLB_ERROR_MULTIHIT = 2,
+};
+
+enum MCE_EratErrorType {
+        MCE_ERAT_ERROR_INDETERMINATE = 0,
+        MCE_ERAT_ERROR_PARITY = 1,
+        MCE_ERAT_ERROR_MULTIHIT = 2,
+};
+
+enum MCE_TlbErrorType {
+        MCE_TLB_ERROR_INDETERMINATE = 0,
+        MCE_TLB_ERROR_PARITY = 1,
+        MCE_TLB_ERROR_MULTIHIT = 2,
+};
+
+struct machine_check_event {
+        enum MCE_Version        version:8;      /* 0x00 */
+        uint8_t                 in_use;         /* 0x01 */
+        enum MCE_Severity       severity:8;     /* 0x02 */
+        enum MCE_Initiator      initiator:8;    /* 0x03 */
+        enum MCE_ErrorType      error_type:8;   /* 0x04 */
+        enum MCE_Disposition    disposition:8;  /* 0x05 */
+        uint8_t                 reserved_1[2];  /* 0x06 */
+        uint64_t                gpr3;           /* 0x08 */
+        uint64_t                srr0;           /* 0x10 */
+        uint64_t                srr1;           /* 0x18 */
+        union {                                 /* 0x20 */
+                struct {
+                        enum MCE_UeErrorType ue_error_type:8;
+                        uint8_t         effective_address_provided;
+                        uint8_t         physical_address_provided;
+                        uint8_t         reserved_1[5];
+                        uint64_t        effective_address;
+                        uint64_t        physical_address;
+                        uint8_t         reserved_2[8];
+                } ue_error;
+
+                struct {
+                        enum MCE_SlbErrorType slb_error_type:8;
+                        uint8_t         effective_address_provided;
+                        uint8_t         reserved_1[6];
+                        uint64_t        effective_address;
+                        uint8_t         reserved_2[16];
+                } slb_error;
+
+                struct {
+                        enum MCE_EratErrorType erat_error_type:8;
+                        uint8_t         effective_address_provided;
+                        uint8_t         reserved_1[6];
+                        uint64_t        effective_address;
+                        uint8_t         reserved_2[16];
+                } erat_error;
+
+                struct {
+                        enum MCE_TlbErrorType tlb_error_type:8;
+                        uint8_t         effective_address_provided;
+                        uint8_t         reserved_1[6];
+                        uint64_t        effective_address;
+                        uint8_t         reserved_2[16];
+                } tlb_error;
+        } u;
+};
+
+struct mce_error_info {
+        enum MCE_ErrorType error_type:8;
+        union {
+                enum MCE_UeErrorType ue_error_type:8;
+                enum MCE_SlbErrorType slb_error_type:8;
+                enum MCE_EratErrorType erat_error_type:8;
+                enum MCE_TlbErrorType tlb_error_type:8;
+        } u;
+        uint8_t         reserved[2];
+};
+
+#define MAX_MC_EVT      100
+
+/* Release flags for get_mce_event() */
+#define MCE_EVENT_RELEASE       true
+#define MCE_EVENT_DONTRELEASE   false
+
+extern void save_mce_event(struct pt_regs *regs, long handled,
+                           struct mce_error_info *mce_err, uint64_t addr);
+extern int get_mce_event(struct machine_check_event *mce, bool release);
+extern void release_mce_event(void);
 
 #endif /* __ASM_PPC64_MCE_H__ */