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authorPaul Mackerras <paulus@samba.org>2011-05-01 15:48:20 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-05-04 01:22:09 -0400
commit48404f2e95ef0ffd8134d89c8abcd1a15e15f1b0 (patch)
treec1f55c2b59f4c32848152a4bdc23aac8537b8cbb /arch/powerpc/include/asm/cputable.h
parent1977b502120d44b9b4897703adfb2e2fab346880 (diff)
powerpc: Save Come-From Address Register (CFAR) in exception frame
Recent 64-bit server processors (POWER6 and POWER7) have a "Come-From Address Register" (CFAR), that records the address of the most recent branch or rfid (return from interrupt) instruction for debugging purposes. This saves the value of the CFAR in the exception entry code and stores it in the exception frame. We also make xmon print the CFAR value in its register dump code. Rather than extend the pt_regs struct at this time, we steal the orig_gpr3 field, which is only used for system calls, and use it for the CFAR value for all exceptions/interrupts other than system calls. This means we don't save the CFAR on system calls, which is not a great problem since system calls tend not to happen unexpectedly, and also avoids adding the overhead of reading the CFAR to the system call entry path. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/cputable.h')
-rw-r--r--arch/powerpc/include/asm/cputable.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index a3e1a9e96a7f..4efbfb3f3254 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -180,6 +180,7 @@ extern const char *powerpc_base_platform;
180 180
181 181
182#define CPU_FTR_HVMODE_206 LONG_ASM_CONST(0x0000000800000000) 182#define CPU_FTR_HVMODE_206 LONG_ASM_CONST(0x0000000800000000)
183#define CPU_FTR_CFAR LONG_ASM_CONST(0x0000001000000000)
183#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000) 184#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000)
184#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) 185#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000)
185#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) 186#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000)
@@ -412,7 +413,7 @@ extern const char *powerpc_base_platform;
412 CPU_FTR_COHERENT_ICACHE | \ 413 CPU_FTR_COHERENT_ICACHE | \
413 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 414 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
414 CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \ 415 CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \
415 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB) 416 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR)
416#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 417#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
417 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_HVMODE_206 |\ 418 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_HVMODE_206 |\
418 CPU_FTR_MMCRA | CPU_FTR_SMT | \ 419 CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -420,7 +421,7 @@ extern const char *powerpc_base_platform;
420 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 421 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
421 CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \ 422 CPU_FTR_DSCR | CPU_FTR_SAO | CPU_FTR_ASYM_SMT | \
422 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \ 423 CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
423 CPU_FTR_ICSWX) 424 CPU_FTR_ICSWX | CPU_FTR_CFAR)
424#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 425#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
425 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 426 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
426 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 427 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \