diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-05-30 19:59:00 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-05-30 19:59:00 -0400 |
commit | 3d00d4ff11686895925f46265f4a78dc78196c2e (patch) | |
tree | c488b013ed7c77c199dd5cd961354a27fabab112 /arch/powerpc/boot | |
parent | 67a3e12b05e055c0415c556a315a3d3eb637e29e (diff) | |
parent | 895443c1c98a21198a0a5265041dc7ad14936d63 (diff) |
Merge commit 'jwb/next' into next
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/4xx.c | 12 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/icon.dts | 447 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/katmai.dts | 1 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/redwood.dts | 122 |
4 files changed, 576 insertions, 6 deletions
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c index 27db8938827a..9d3bd4c45a24 100644 --- a/arch/powerpc/boot/4xx.c +++ b/arch/powerpc/boot/4xx.c | |||
@@ -519,7 +519,7 @@ void ibm440ep_fixup_clocks(unsigned int sys_clk, | |||
519 | { | 519 | { |
520 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0); | 520 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0); |
521 | 521 | ||
522 | /* serial clocks beed fixup based on int/ext */ | 522 | /* serial clocks need fixup based on int/ext */ |
523 | eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk); | 523 | eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk); |
524 | eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk); | 524 | eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk); |
525 | eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk); | 525 | eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk); |
@@ -532,7 +532,7 @@ void ibm440gx_fixup_clocks(unsigned int sys_clk, | |||
532 | { | 532 | { |
533 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); | 533 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); |
534 | 534 | ||
535 | /* serial clocks beed fixup based on int/ext */ | 535 | /* serial clocks need fixup based on int/ext */ |
536 | eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk); | 536 | eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk); |
537 | eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk); | 537 | eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk); |
538 | } | 538 | } |
@@ -543,10 +543,10 @@ void ibm440spe_fixup_clocks(unsigned int sys_clk, | |||
543 | { | 543 | { |
544 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); | 544 | unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1); |
545 | 545 | ||
546 | /* serial clocks beed fixup based on int/ext */ | 546 | /* serial clocks need fixup based on int/ext */ |
547 | eplike_fixup_uart_clk(0, "/plb/opb/serial@10000200", ser_clk, plb_clk); | 547 | eplike_fixup_uart_clk(0, "/plb/opb/serial@f0000200", ser_clk, plb_clk); |
548 | eplike_fixup_uart_clk(1, "/plb/opb/serial@10000300", ser_clk, plb_clk); | 548 | eplike_fixup_uart_clk(1, "/plb/opb/serial@f0000300", ser_clk, plb_clk); |
549 | eplike_fixup_uart_clk(2, "/plb/opb/serial@10000600", ser_clk, plb_clk); | 549 | eplike_fixup_uart_clk(2, "/plb/opb/serial@f0000600", ser_clk, plb_clk); |
550 | } | 550 | } |
551 | 551 | ||
552 | void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) | 552 | void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk) |
diff --git a/arch/powerpc/boot/dts/icon.dts b/arch/powerpc/boot/dts/icon.dts new file mode 100644 index 000000000000..abcd0caeccae --- /dev/null +++ b/arch/powerpc/boot/dts/icon.dts | |||
@@ -0,0 +1,447 @@ | |||
1 | /* | ||
2 | * Device Tree Source for Mosaix Technologies, Inc. ICON board | ||
3 | * | ||
4 | * Copyright 2010 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without | ||
8 | * any warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /dts-v1/; | ||
12 | |||
13 | / { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <2>; | ||
16 | model = "mosaixtech,icon"; | ||
17 | compatible = "mosaixtech,icon"; | ||
18 | dcr-parent = <&{/cpus/cpu@0}>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &EMAC0; | ||
22 | serial0 = &UART0; | ||
23 | serial1 = &UART1; | ||
24 | serial2 = &UART2; | ||
25 | }; | ||
26 | |||
27 | cpus { | ||
28 | #address-cells = <1>; | ||
29 | #size-cells = <0>; | ||
30 | |||
31 | cpu@0 { | ||
32 | device_type = "cpu"; | ||
33 | model = "PowerPC,440SPe"; | ||
34 | reg = <0x00000000>; | ||
35 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
36 | timebase-frequency = <0>; /* Filled in by U-Boot */ | ||
37 | i-cache-line-size = <32>; | ||
38 | d-cache-line-size = <32>; | ||
39 | i-cache-size = <32768>; | ||
40 | d-cache-size = <32768>; | ||
41 | dcr-controller; | ||
42 | dcr-access-method = "native"; | ||
43 | reset-type = <2>; /* Use chip-reset */ | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | memory { | ||
48 | device_type = "memory"; | ||
49 | reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ | ||
50 | }; | ||
51 | |||
52 | UIC0: interrupt-controller0 { | ||
53 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
54 | interrupt-controller; | ||
55 | cell-index = <0>; | ||
56 | dcr-reg = <0x0c0 0x009>; | ||
57 | #address-cells = <0>; | ||
58 | #size-cells = <0>; | ||
59 | #interrupt-cells = <2>; | ||
60 | }; | ||
61 | |||
62 | UIC1: interrupt-controller1 { | ||
63 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
64 | interrupt-controller; | ||
65 | cell-index = <1>; | ||
66 | dcr-reg = <0x0d0 0x009>; | ||
67 | #address-cells = <0>; | ||
68 | #size-cells = <0>; | ||
69 | #interrupt-cells = <2>; | ||
70 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ | ||
71 | interrupt-parent = <&UIC0>; | ||
72 | }; | ||
73 | |||
74 | UIC2: interrupt-controller2 { | ||
75 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
76 | interrupt-controller; | ||
77 | cell-index = <2>; | ||
78 | dcr-reg = <0x0e0 0x009>; | ||
79 | #address-cells = <0>; | ||
80 | #size-cells = <0>; | ||
81 | #interrupt-cells = <2>; | ||
82 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ | ||
83 | interrupt-parent = <&UIC0>; | ||
84 | }; | ||
85 | |||
86 | UIC3: interrupt-controller3 { | ||
87 | compatible = "ibm,uic-440spe","ibm,uic"; | ||
88 | interrupt-controller; | ||
89 | cell-index = <3>; | ||
90 | dcr-reg = <0x0f0 0x009>; | ||
91 | #address-cells = <0>; | ||
92 | #size-cells = <0>; | ||
93 | #interrupt-cells = <2>; | ||
94 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ | ||
95 | interrupt-parent = <&UIC0>; | ||
96 | }; | ||
97 | |||
98 | SDR0: sdr { | ||
99 | compatible = "ibm,sdr-440spe"; | ||
100 | dcr-reg = <0x00e 0x002>; | ||
101 | }; | ||
102 | |||
103 | CPR0: cpr { | ||
104 | compatible = "ibm,cpr-440spe"; | ||
105 | dcr-reg = <0x00c 0x002>; | ||
106 | }; | ||
107 | |||
108 | MQ0: mq { | ||
109 | compatible = "ibm,mq-440spe"; | ||
110 | dcr-reg = <0x040 0x020>; | ||
111 | }; | ||
112 | |||
113 | plb { | ||
114 | compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; | ||
115 | #address-cells = <2>; | ||
116 | #size-cells = <1>; | ||
117 | /* addr-child addr-parent size */ | ||
118 | ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 | ||
119 | 0x4 0x00200000 0x4 0x00200000 0x00000400 | ||
120 | 0x4 0xe0000000 0x4 0xe0000000 0x20000000 | ||
121 | 0xc 0x00000000 0xc 0x00000000 0x20000000 | ||
122 | 0xd 0x00000000 0xd 0x00000000 0x80000000 | ||
123 | 0xd 0x80000000 0xd 0x80000000 0x80000000 | ||
124 | 0xe 0x00000000 0xe 0x00000000 0x80000000 | ||
125 | 0xe 0x80000000 0xe 0x80000000 0x80000000 | ||
126 | 0xf 0x00000000 0xf 0x00000000 0x80000000 | ||
127 | 0xf 0x80000000 0xf 0x80000000 0x80000000>; | ||
128 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
129 | |||
130 | SDRAM0: sdram { | ||
131 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; | ||
132 | dcr-reg = <0x010 0x002>; | ||
133 | }; | ||
134 | |||
135 | MAL0: mcmal { | ||
136 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; | ||
137 | dcr-reg = <0x180 0x062>; | ||
138 | num-tx-chans = <2>; | ||
139 | num-rx-chans = <1>; | ||
140 | interrupt-parent = <&MAL0>; | ||
141 | interrupts = <0x0 0x1 0x2 0x3 0x4>; | ||
142 | #interrupt-cells = <1>; | ||
143 | #address-cells = <0>; | ||
144 | #size-cells = <0>; | ||
145 | interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 | ||
146 | /*RXEOB*/ 0x1 &UIC1 0x7 0x4 | ||
147 | /*SERR*/ 0x2 &UIC1 0x1 0x4 | ||
148 | /*TXDE*/ 0x3 &UIC1 0x2 0x4 | ||
149 | /*RXDE*/ 0x4 &UIC1 0x3 0x4>; | ||
150 | }; | ||
151 | |||
152 | POB0: opb { | ||
153 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <1>; | ||
156 | ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; | ||
157 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
158 | |||
159 | EBC0: ebc { | ||
160 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; | ||
161 | dcr-reg = <0x012 0x002>; | ||
162 | #address-cells = <2>; | ||
163 | #size-cells = <1>; | ||
164 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
165 | /* ranges property is supplied by U-Boot */ | ||
166 | interrupts = <0x5 0x1>; | ||
167 | interrupt-parent = <&UIC1>; | ||
168 | |||
169 | nor_flash@0,0 { | ||
170 | compatible = "cfi-flash"; | ||
171 | bank-width = <2>; | ||
172 | reg = <0x00000000 0x00000000 0x01000000>; | ||
173 | #address-cells = <1>; | ||
174 | #size-cells = <1>; | ||
175 | partition@0 { | ||
176 | label = "kernel"; | ||
177 | reg = <0x00000000 0x001e0000>; | ||
178 | }; | ||
179 | partition@1e0000 { | ||
180 | label = "dtb"; | ||
181 | reg = <0x001e0000 0x00020000>; | ||
182 | }; | ||
183 | partition@200000 { | ||
184 | label = "root"; | ||
185 | reg = <0x00200000 0x00200000>; | ||
186 | }; | ||
187 | partition@400000 { | ||
188 | label = "user"; | ||
189 | reg = <0x00400000 0x00b60000>; | ||
190 | }; | ||
191 | partition@f60000 { | ||
192 | label = "env"; | ||
193 | reg = <0x00f60000 0x00040000>; | ||
194 | }; | ||
195 | partition@fa0000 { | ||
196 | label = "u-boot"; | ||
197 | reg = <0x00fa0000 0x00060000>; | ||
198 | }; | ||
199 | }; | ||
200 | |||
201 | SysACE_CompactFlash: sysace@1,0 { | ||
202 | compatible = "xlnx,sysace"; | ||
203 | interrupt-parent = <&UIC2>; | ||
204 | interrupts = <24 0x4>; | ||
205 | reg = <0x00000001 0x00000000 0x10000>; | ||
206 | }; | ||
207 | }; | ||
208 | |||
209 | UART0: serial@f0000200 { | ||
210 | device_type = "serial"; | ||
211 | compatible = "ns16550"; | ||
212 | reg = <0xf0000200 0x00000008>; | ||
213 | virtual-reg = <0xa0000200>; | ||
214 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
215 | current-speed = <115200>; | ||
216 | interrupt-parent = <&UIC0>; | ||
217 | interrupts = <0x0 0x4>; | ||
218 | }; | ||
219 | |||
220 | UART1: serial@f0000300 { | ||
221 | device_type = "serial"; | ||
222 | compatible = "ns16550"; | ||
223 | reg = <0xf0000300 0x00000008>; | ||
224 | virtual-reg = <0xa0000300>; | ||
225 | clock-frequency = <0>; | ||
226 | current-speed = <0>; | ||
227 | interrupt-parent = <&UIC0>; | ||
228 | interrupts = <0x1 0x4>; | ||
229 | }; | ||
230 | |||
231 | |||
232 | UART2: serial@f0000600 { | ||
233 | device_type = "serial"; | ||
234 | compatible = "ns16550"; | ||
235 | reg = <0xf0000600 0x00000008>; | ||
236 | virtual-reg = <0xa0000600>; | ||
237 | clock-frequency = <0>; | ||
238 | current-speed = <0>; | ||
239 | interrupt-parent = <&UIC1>; | ||
240 | interrupts = <0x5 0x4>; | ||
241 | }; | ||
242 | |||
243 | IIC0: i2c@f0000400 { | ||
244 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | ||
245 | reg = <0xf0000400 0x00000014>; | ||
246 | interrupt-parent = <&UIC0>; | ||
247 | interrupts = <0x2 0x4>; | ||
248 | }; | ||
249 | |||
250 | IIC1: i2c@f0000500 { | ||
251 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | ||
252 | reg = <0xf0000500 0x00000014>; | ||
253 | interrupt-parent = <&UIC0>; | ||
254 | interrupts = <0x3 0x4>; | ||
255 | #address-cells = <1>; | ||
256 | #size-cells = <0>; | ||
257 | |||
258 | rtc@68 { | ||
259 | compatible = "stm,m41t00"; | ||
260 | reg = <0x68>; | ||
261 | }; | ||
262 | }; | ||
263 | |||
264 | EMAC0: ethernet@f0000800 { | ||
265 | linux,network-index = <0x0>; | ||
266 | device_type = "network"; | ||
267 | compatible = "ibm,emac-440spe", "ibm,emac4"; | ||
268 | interrupt-parent = <&UIC1>; | ||
269 | interrupts = <0x1c 0x4 0x1d 0x4>; | ||
270 | reg = <0xf0000800 0x00000074>; | ||
271 | local-mac-address = [000000000000]; | ||
272 | mal-device = <&MAL0>; | ||
273 | mal-tx-channel = <0>; | ||
274 | mal-rx-channel = <0>; | ||
275 | cell-index = <0>; | ||
276 | max-frame-size = <9000>; | ||
277 | rx-fifo-size = <4096>; | ||
278 | tx-fifo-size = <2048>; | ||
279 | phy-mode = "gmii"; | ||
280 | phy-map = <0x00000000>; | ||
281 | has-inverted-stacr-oc; | ||
282 | has-new-stacr-staopc; | ||
283 | }; | ||
284 | }; | ||
285 | |||
286 | PCIX0: pci@c0ec00000 { | ||
287 | device_type = "pci"; | ||
288 | #interrupt-cells = <1>; | ||
289 | #size-cells = <2>; | ||
290 | #address-cells = <3>; | ||
291 | compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; | ||
292 | primary; | ||
293 | large-inbound-windows; | ||
294 | enable-msi-hole; | ||
295 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ | ||
296 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ | ||
297 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ | ||
298 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ | ||
299 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ | ||
300 | |||
301 | /* Outbound ranges, one memory and one IO, | ||
302 | * later cannot be changed | ||
303 | */ | ||
304 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 | ||
305 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; | ||
306 | |||
307 | /* Inbound 4GB range starting at 0 */ | ||
308 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
309 | |||
310 | /* This drives busses 0 to 0xf */ | ||
311 | bus-range = <0x0 0xf>; | ||
312 | |||
313 | /* PCI-X interrupt (SM502) is routed to extIRQ10 (UIC1, 19) */ | ||
314 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; | ||
315 | interrupt-map = <0x0 0x0 0x0 0x0 &UIC1 19 0x8>; | ||
316 | }; | ||
317 | |||
318 | PCIE0: pciex@d00000000 { | ||
319 | device_type = "pci"; | ||
320 | #interrupt-cells = <1>; | ||
321 | #size-cells = <2>; | ||
322 | #address-cells = <3>; | ||
323 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | ||
324 | primary; | ||
325 | port = <0x0>; /* port number */ | ||
326 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ | ||
327 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ | ||
328 | dcr-reg = <0x100 0x020>; | ||
329 | sdr-base = <0x300>; | ||
330 | |||
331 | /* Outbound ranges, one memory and one IO, | ||
332 | * later cannot be changed | ||
333 | */ | ||
334 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | ||
335 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | ||
336 | |||
337 | /* Inbound 4GB range starting at 0 */ | ||
338 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
339 | |||
340 | /* This drives busses 0x10 to 0x1f */ | ||
341 | bus-range = <0x10 0x1f>; | ||
342 | |||
343 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
344 | * to invert PCIe legacy interrupts). | ||
345 | * We are de-swizzling here because the numbers are actually for | ||
346 | * port of the root complex virtual P2P bridge. But I want | ||
347 | * to avoid putting a node for it in the tree, so the numbers | ||
348 | * below are basically de-swizzled numbers. | ||
349 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
350 | */ | ||
351 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
352 | interrupt-map = < | ||
353 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | ||
354 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | ||
355 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | ||
356 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | ||
357 | }; | ||
358 | |||
359 | PCIE1: pciex@d20000000 { | ||
360 | device_type = "pci"; | ||
361 | #interrupt-cells = <1>; | ||
362 | #size-cells = <2>; | ||
363 | #address-cells = <3>; | ||
364 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | ||
365 | primary; | ||
366 | port = <0x1>; /* port number */ | ||
367 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ | ||
368 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ | ||
369 | dcr-reg = <0x120 0x020>; | ||
370 | sdr-base = <0x340>; | ||
371 | |||
372 | /* Outbound ranges, one memory and one IO, | ||
373 | * later cannot be changed | ||
374 | */ | ||
375 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | ||
376 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | ||
377 | |||
378 | /* Inbound 4GB range starting at 0 */ | ||
379 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; | ||
380 | |||
381 | /* This drives busses 0x20 to 0x2f */ | ||
382 | bus-range = <0x20 0x2f>; | ||
383 | |||
384 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
385 | * to invert PCIe legacy interrupts). | ||
386 | * We are de-swizzling here because the numbers are actually for | ||
387 | * port of the root complex virtual P2P bridge. But I want | ||
388 | * to avoid putting a node for it in the tree, so the numbers | ||
389 | * below are basically de-swizzled numbers. | ||
390 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
391 | */ | ||
392 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
393 | interrupt-map = < | ||
394 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | ||
395 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | ||
396 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | ||
397 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | ||
398 | }; | ||
399 | |||
400 | I2O: i2o@400100000 { | ||
401 | compatible = "ibm,i2o-440spe"; | ||
402 | reg = <0x00000004 0x00100000 0x100>; | ||
403 | dcr-reg = <0x060 0x020>; | ||
404 | }; | ||
405 | |||
406 | DMA0: dma0@400100100 { | ||
407 | compatible = "ibm,dma-440spe"; | ||
408 | cell-index = <0>; | ||
409 | reg = <0x00000004 0x00100100 0x100>; | ||
410 | dcr-reg = <0x060 0x020>; | ||
411 | interrupt-parent = <&DMA0>; | ||
412 | interrupts = <0 1>; | ||
413 | #interrupt-cells = <1>; | ||
414 | #address-cells = <0>; | ||
415 | #size-cells = <0>; | ||
416 | interrupt-map = < | ||
417 | 0 &UIC0 0x14 4 | ||
418 | 1 &UIC1 0x16 4>; | ||
419 | }; | ||
420 | |||
421 | DMA1: dma1@400100200 { | ||
422 | compatible = "ibm,dma-440spe"; | ||
423 | cell-index = <1>; | ||
424 | reg = <0x00000004 0x00100200 0x100>; | ||
425 | dcr-reg = <0x060 0x020>; | ||
426 | interrupt-parent = <&DMA1>; | ||
427 | interrupts = <0 1>; | ||
428 | #interrupt-cells = <1>; | ||
429 | #address-cells = <0>; | ||
430 | #size-cells = <0>; | ||
431 | interrupt-map = < | ||
432 | 0 &UIC0 0x16 4 | ||
433 | 1 &UIC1 0x16 4>; | ||
434 | }; | ||
435 | |||
436 | xor-accel@400200000 { | ||
437 | compatible = "amcc,xor-accelerator"; | ||
438 | reg = <0x00000004 0x00200000 0x400>; | ||
439 | interrupt-parent = <&UIC1>; | ||
440 | interrupts = <0x1f 4>; | ||
441 | }; | ||
442 | }; | ||
443 | |||
444 | chosen { | ||
445 | linux,stdout-path = "/plb/opb/serial@f0000200"; | ||
446 | }; | ||
447 | }; | ||
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index 8cf2c0c88c05..7c3be5e45748 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
@@ -44,6 +44,7 @@ | |||
44 | d-cache-size = <32768>; | 44 | d-cache-size = <32768>; |
45 | dcr-controller; | 45 | dcr-controller; |
46 | dcr-access-method = "native"; | 46 | dcr-access-method = "native"; |
47 | reset-type = <2>; /* Use chip-reset */ | ||
47 | }; | 48 | }; |
48 | }; | 49 | }; |
49 | 50 | ||
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts index d2af32e2bf7a..81636c01d906 100644 --- a/arch/powerpc/boot/dts/redwood.dts +++ b/arch/powerpc/boot/dts/redwood.dts | |||
@@ -234,10 +234,132 @@ | |||
234 | has-inverted-stacr-oc; | 234 | has-inverted-stacr-oc; |
235 | has-new-stacr-staopc; | 235 | has-new-stacr-staopc; |
236 | }; | 236 | }; |
237 | }; | ||
238 | PCIE0: pciex@d00000000 { | ||
239 | device_type = "pci"; | ||
240 | #interrupt-cells = <1>; | ||
241 | #size-cells = <2>; | ||
242 | #address-cells = <3>; | ||
243 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
244 | primary; | ||
245 | port = <0x0>; /* port number */ | ||
246 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ | ||
247 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ | ||
248 | dcr-reg = <0x100 0x020>; | ||
249 | sdr-base = <0x300>; | ||
250 | |||
251 | /* Outbound ranges, one memory and one IO, | ||
252 | * later cannot be changed | ||
253 | */ | ||
254 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 | ||
255 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; | ||
256 | |||
257 | /* Inbound 2GB range starting at 0 */ | ||
258 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
237 | 259 | ||
260 | /* This drives busses 10 to 0x1f */ | ||
261 | bus-range = <0x10 0x1f>; | ||
262 | |||
263 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
264 | * to invert PCIe legacy interrupts). | ||
265 | * We are de-swizzling here because the numbers are actually for | ||
266 | * port of the root complex virtual P2P bridge. But I want | ||
267 | * to avoid putting a node for it in the tree, so the numbers | ||
268 | * below are basically de-swizzled numbers. | ||
269 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
270 | */ | ||
271 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
272 | interrupt-map = < | ||
273 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ | ||
274 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ | ||
275 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ | ||
276 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; | ||
277 | }; | ||
278 | |||
279 | PCIE1: pciex@d20000000 { | ||
280 | device_type = "pci"; | ||
281 | #interrupt-cells = <1>; | ||
282 | #size-cells = <2>; | ||
283 | #address-cells = <3>; | ||
284 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
285 | primary; | ||
286 | port = <0x1>; /* port number */ | ||
287 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ | ||
288 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ | ||
289 | dcr-reg = <0x120 0x020>; | ||
290 | sdr-base = <0x340>; | ||
291 | |||
292 | /* Outbound ranges, one memory and one IO, | ||
293 | * later cannot be changed | ||
294 | */ | ||
295 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 | ||
296 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; | ||
297 | |||
298 | /* Inbound 2GB range starting at 0 */ | ||
299 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
300 | |||
301 | /* This drives busses 10 to 0x1f */ | ||
302 | bus-range = <0x20 0x2f>; | ||
303 | |||
304 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
305 | * to invert PCIe legacy interrupts). | ||
306 | * We are de-swizzling here because the numbers are actually for | ||
307 | * port of the root complex virtual P2P bridge. But I want | ||
308 | * to avoid putting a node for it in the tree, so the numbers | ||
309 | * below are basically de-swizzled numbers. | ||
310 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
311 | */ | ||
312 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
313 | interrupt-map = < | ||
314 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ | ||
315 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ | ||
316 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ | ||
317 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; | ||
318 | }; | ||
319 | |||
320 | PCIE2: pciex@d40000000 { | ||
321 | device_type = "pci"; | ||
322 | #interrupt-cells = <1>; | ||
323 | #size-cells = <2>; | ||
324 | #address-cells = <3>; | ||
325 | compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; | ||
326 | primary; | ||
327 | port = <0x2>; /* port number */ | ||
328 | reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ | ||
329 | 0x0000000c 0x10002000 0x00001000>; /* Registers */ | ||
330 | dcr-reg = <0x140 0x020>; | ||
331 | sdr-base = <0x370>; | ||
332 | |||
333 | /* Outbound ranges, one memory and one IO, | ||
334 | * later cannot be changed | ||
335 | */ | ||
336 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 | ||
337 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; | ||
338 | |||
339 | /* Inbound 2GB range starting at 0 */ | ||
340 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; | ||
341 | |||
342 | /* This drives busses 10 to 0x1f */ | ||
343 | bus-range = <0x30 0x3f>; | ||
344 | |||
345 | /* Legacy interrupts (note the weird polarity, the bridge seems | ||
346 | * to invert PCIe legacy interrupts). | ||
347 | * We are de-swizzling here because the numbers are actually for | ||
348 | * port of the root complex virtual P2P bridge. But I want | ||
349 | * to avoid putting a node for it in the tree, so the numbers | ||
350 | * below are basically de-swizzled numbers. | ||
351 | * The real slot is on idsel 0, so the swizzling is 1:1 | ||
352 | */ | ||
353 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | ||
354 | interrupt-map = < | ||
355 | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ | ||
356 | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ | ||
357 | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ | ||
358 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; | ||
238 | }; | 359 | }; |
239 | 360 | ||
240 | }; | 361 | }; |
362 | |||
241 | chosen { | 363 | chosen { |
242 | linux,stdout-path = "/plb/opb/serial@ef600200"; | 364 | linux,stdout-path = "/plb/opb/serial@ef600200"; |
243 | }; | 365 | }; |