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authorGerhard Pircher <gerhard_pircher@gmx.net>2009-02-10 07:26:03 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-02-11 00:00:09 -0500
commit50408b7defa513a9ea1107b42674167e53ba7a4a (patch)
treefa68db2dc5d5d3635cdf0a8a666b2c0140aa33b9 /arch/powerpc/boot
parent54b318aa5211ab7bba617a27d9cbd7fd759dcfd0 (diff)
powerpc/amigaone: Generic device tree for all AmigaOne boards
This device tree does not provide the correct CPU name, as various CPU models and revisions are used in AmigaOnes. Also the PCI root node does not contain a interrupt mapping property, as all boards have different interrupt routing. However the kernel can do a 1:1 mapping of all PCI interrupts, as only i8259 legacy interrupts are used. Signed-off-by: Gerhard Pircher <gerhard_pircher@gmx.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/amigaone.dts173
1 files changed, 173 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts
new file mode 100644
index 000000000000..26549fca2ed4
--- /dev/null
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -0,0 +1,173 @@
1/*
2 * AmigaOne Device Tree Source
3 *
4 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "AmigaOne";
16 compatible = "eyetech,amigaone";
17 coherency-off;
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 cpus {
22 #cpus = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
25
26 cpu@0 {
27 device_type = "cpu";
28 reg = <0>;
29 d-cache-line-size = <32>; // 32 bytes
30 i-cache-line-size = <32>; // 32 bytes
31 d-cache-size = <32768>; // L1, 32K
32 i-cache-size = <32768>; // L1, 32K
33 timebase-frequency = <0>; // 33.3 MHz, from U-boot
34 clock-frequency = <0>; // From U-boot
35 bus-frequency = <0>; // From U-boot
36 };
37 };
38
39 memory {
40 device_type = "memory";
41 reg = <0 0>; // From U-boot
42 };
43
44 pci@80000000 {
45 device_type = "pci";
46 compatible = "mai-logic,articia-s";
47 bus-frequency = <33333333>;
48 bus-range = <0 0xff>;
49 ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O
50 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory
51 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA)
52 // Configuration address and data register.
53 reg = <0xfec00cf8 4
54 0xfee00cfc 4>;
55 8259-interrupt-acknowledge = <0xfef00000>;
56 // Do not define a interrupt-parent here, if there is no
57 // interrupt-map property.
58 #address-cells = <3>;
59 #size-cells = <2>;
60
61 isa@7 {
62 device_type = "isa";
63 compatible = "pciclass,0601";
64 vendor-id = <0x00001106>;
65 device-id = <0x00000686>;
66 revision-id = <0x00000010>;
67 class-code = <0x00060100>;
68 subsystem-id = <0>;
69 subsystem-vendor-id = <0>;
70 devsel-speed = <0x00000001>;
71 min-grant = <0>;
72 max-latency = <0>;
73 /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
74 ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>;
75 interrupt-parent = <&i8259>;
76 #interrupt-cells = <2>;
77 #address-cells = <2>;
78 #size-cells = <1>;
79
80 dma-controller@0 {
81 compatible = "pnpPNP,200";
82 reg = <1 0x00000000 0x00000020
83 1 0x00000080 0x00000010
84 1 0x000000c0 0x00000020>;
85 };
86
87 i8259: interrupt-controller@20 {
88 device_type = "interrupt-controller";
89 compatible = "pnpPNP,000";
90 interrupt-controller;
91 reg = <1 0x00000020 0x00000002
92 1 0x000000a0 0x00000002
93 1 0x000004d0 0x00000002>;
94 reserved-interrupts = <2>;
95 #interrupt-cells = <2>;
96 };
97
98 timer@40 {
99 // Also adds pcspkr to platform devices.
100 compatible = "pnpPNP,100";
101 reg = <1 0x00000040 0x00000020>;
102 };
103
104 8042@60 {
105 device_type = "8042";
106 reg = <1 0x00000060 0x00000001
107 1 0x00000064 0x00000001>;
108 interrupts = <1 3 12 3>;
109 #address-cells = <1>;
110 #size-cells = <0>;
111
112 keyboard@0 {
113 compatible = "pnpPNP,303";
114 reg = <0>;
115 };
116
117 mouse@1 {
118 compatible = "pnpPNP,f03";
119 reg = <1>;
120 };
121 };
122
123 rtc@70 {
124 compatible = "pnpPNP,b00";
125 reg = <1 0x00000070 0x00000002>;
126 interrupts = <8 3>;
127 };
128
129 serial@3f8 {
130 device_type = "serial";
131 compatible = "pnpPNP,501","pnpPNP,500";
132 reg = <1 0x000003f8 0x00000008>;
133 interrupts = <4 3>;
134 clock-frequency = <1843200>;
135 current-speed = <115200>;
136 };
137
138 serial@2f8 {
139 device_type = "serial";
140 compatible = "pnpPNP,501","pnpPNP,500";
141 reg = <1 0x000002f8 0x00000008>;
142 interrupts = <3 3>;
143 clock-frequency = <1843200>;
144 current-speed = <115200>;
145 };
146
147 parallel@378 {
148 device_type = "parallel";
149 // No ECP support for now, otherwise add "pnpPNP,401".
150 compatible = "pnpPNP,400";
151 reg = <1 0x00000378 0x00000003
152 1 0x00000778 0x00000003>;
153 };
154
155 fdc@3f0 {
156 device_type = "fdc";
157 compatible = "pnpPNP,700";
158 reg = <1 0x000003f0 0x00000008>;
159 interrupts = <6 3>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162
163 disk@0 {
164 reg = <0>;
165 };
166 };
167 };
168 };
169
170 chosen {
171 linux,stdout-path = "/pci@80000000/isa@7/serial@3f8";
172 };
173};