powerpc/85xx: Update dts for PCIe memory maps to match u-boot of Px020RDB

PCIe memory address space is 1:1 mapped with u-boot. Update dts of Px020RDB i.e. P1020RDB and P2020RDB to match the address map changes in u-boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
author: Prabhakar Kushwaha <prabhakar@freescale.com> 2011-03-25 00:47:45 -0400
committer: Kumar Gala <galak@kernel.crashing.org> 2011-04-04 10:30:40 -0400
commit: d2f989262ee713b9a8a9a1baedc2445ed958d986 (patch)
tree: 47caedd26841ae90202d7eeac78e354c39a95a9c /arch/powerpc/boot
parent: c0bb9e45f3a7f67fc358946727bc3d5f23d0f55d (diff)
4 files changed, 19 insertions, 19 deletions
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index 22f64b62d7f6..e0668f877794 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -1,7 +1,7 @@
 /*
 * P1020 RDB Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -553,7 +553,7 @@
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
@@ -580,8 +580,8 @@
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <16 2>;
@@ -590,8 +590,8 @@
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index da4cb0d8d215..e2d48fd4416e 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
 /*
 * P2020 RDB Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -537,7 +537,7 @@
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <25 2>;
@@ -564,8 +564,8 @@
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <26 2>;
@@ -574,8 +574,8 @@
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
index 0fe93d0c8b2e..b69c3a5dc858 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
@@ -6,7 +6,7 @@
 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
 * eth1, eth2, sdhc, crypto, global-util, pci0.
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -342,7 +342,7 @@
                reg = <0 0xffe09000 0 0x1000>;
                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <25 2>;
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
index e95a51285328..7a31d46c01b0 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
@@ -7,7 +7,7 @@
 *
 * Please note to add "-b 1" for core1's dts compiling.
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -162,8 +162,8 @@
                #address-cells = <3>;
                reg = <0 0xffe0a000 0 0x1000>;
                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
                interrupt-parent = <&mpic>;
                interrupts = <26 2>;
@@ -172,8 +172,8 @@
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
author	Prabhakar Kushwaha <prabhakar@freescale.com>	2011-03-25 00:47:45 -0400
committer	Kumar Gala <galak@kernel.crashing.org>	2011-04-04 10:30:40 -0400
commit	d2f989262ee713b9a8a9a1baedc2445ed958d986 (patch)
tree	47caedd26841ae90202d7eeac78e354c39a95a9c /arch/powerpc/boot
parent	c0bb9e45f3a7f67fc358946727bc3d5f23d0f55d (diff)

diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts index 22f64b62d7f6..e0668f877794 100644 --- a/arch/powerpc/boot/dts/p1020rdb.dts +++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -1,7 +1,7 @@
1	/*	1	/*
2	* P1020 RDB Device Tree Source	2	* P1020 RDB Device Tree Source
3	*	3	*
4	* Copyright 2009 Freescale Semiconductor Inc.	4	* Copyright 2009-2011 Freescale Semiconductor Inc.
5	*	5	*
6	* This program is free software; you can redistribute it and/or modify it	6	* This program is free software; you can redistribute it and/or modify it
7	* under the terms of the GNU General Public License as published by the	7	* under the terms of the GNU General Public License as published by the
@@ -553,7 +553,7 @@
553	reg = <0 0xffe09000 0 0x1000>;	553	reg = <0 0xffe09000 0 0x1000>;
554	bus-range = <0 255>;	554	bus-range = <0 255>;
555	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000	555	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
556	0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;	556	0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
557	clock-frequency = <33333333>;	557	clock-frequency = <33333333>;
558	interrupt-parent = <&mpic>;	558	interrupt-parent = <&mpic>;
559	interrupts = <16 2>;	559	interrupts = <16 2>;
@@ -580,8 +580,8 @@
580	#address-cells = <3>;	580	#address-cells = <3>;
581	reg = <0 0xffe0a000 0 0x1000>;	581	reg = <0 0xffe0a000 0 0x1000>;
582	bus-range = <0 255>;	582	bus-range = <0 255>;
583	ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000	583	ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
584	0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;	584	0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
585	clock-frequency = <33333333>;	585	clock-frequency = <33333333>;
586	interrupt-parent = <&mpic>;	586	interrupt-parent = <&mpic>;
587	interrupts = <16 2>;	587	interrupts = <16 2>;
@@ -590,8 +590,8 @@
590	#size-cells = <2>;	590	#size-cells = <2>;
591	#address-cells = <3>;	591	#address-cells = <3>;
592	device_type = "pci";	592	device_type = "pci";
593	ranges = <0x2000000 0x0 0xc0000000	593	ranges = <0x2000000 0x0 0x80000000
594	0x2000000 0x0 0xc0000000	594	0x2000000 0x0 0x80000000
595	0x0 0x20000000	595	0x0 0x20000000
596		596
597	0x1000000 0x0 0x0	597	0x1000000 0x0 0x0


diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts index da4cb0d8d215..e2d48fd4416e 100644 --- a/arch/powerpc/boot/dts/p2020rdb.dts +++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
1	/*	1	/*
2	* P2020 RDB Device Tree Source	2	* P2020 RDB Device Tree Source
3	*	3	*
4	* Copyright 2009 Freescale Semiconductor Inc.	4	* Copyright 2009-2011 Freescale Semiconductor Inc.
5	*	5	*
6	* This program is free software; you can redistribute it and/or modify it	6	* This program is free software; you can redistribute it and/or modify it
7	* under the terms of the GNU General Public License as published by the	7	* under the terms of the GNU General Public License as published by the
@@ -537,7 +537,7 @@
537	reg = <0 0xffe09000 0 0x1000>;	537	reg = <0 0xffe09000 0 0x1000>;
538	bus-range = <0 255>;	538	bus-range = <0 255>;
539	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000	539	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
540	0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;	540	0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
541	clock-frequency = <33333333>;	541	clock-frequency = <33333333>;
542	interrupt-parent = <&mpic>;	542	interrupt-parent = <&mpic>;
543	interrupts = <25 2>;	543	interrupts = <25 2>;
@@ -564,8 +564,8 @@
564	#address-cells = <3>;	564	#address-cells = <3>;
565	reg = <0 0xffe0a000 0 0x1000>;	565	reg = <0 0xffe0a000 0 0x1000>;
566	bus-range = <0 255>;	566	bus-range = <0 255>;
567	ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000	567	ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
568	0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;	568	0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
569	clock-frequency = <33333333>;	569	clock-frequency = <33333333>;
570	interrupt-parent = <&mpic>;	570	interrupt-parent = <&mpic>;
571	interrupts = <26 2>;	571	interrupts = <26 2>;
@@ -574,8 +574,8 @@
574	#size-cells = <2>;	574	#size-cells = <2>;
575	#address-cells = <3>;	575	#address-cells = <3>;
576	device_type = "pci";	576	device_type = "pci";
577	ranges = <0x2000000 0x0 0xc0000000	577	ranges = <0x2000000 0x0 0x80000000
578	0x2000000 0x0 0xc0000000	578	0x2000000 0x0 0x80000000
579	0x0 0x20000000	579	0x0 0x20000000
580		580
581	0x1000000 0x0 0x0	581	0x1000000 0x0 0x0


diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts index 0fe93d0c8b2e..b69c3a5dc858 100644 --- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
@@ -6,7 +6,7 @@
6	* This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,	6	* This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
7	* eth1, eth2, sdhc, crypto, global-util, pci0.	7	* eth1, eth2, sdhc, crypto, global-util, pci0.
8	*	8	*
9	* Copyright 2009 Freescale Semiconductor Inc.	9	* Copyright 2009-2011 Freescale Semiconductor Inc.
10	*	10	*
11	* This program is free software; you can redistribute it and/or modify it	11	* This program is free software; you can redistribute it and/or modify it
12	* under the terms of the GNU General Public License as published by the	12	* under the terms of the GNU General Public License as published by the
@@ -342,7 +342,7 @@
342	reg = <0 0xffe09000 0 0x1000>;	342	reg = <0 0xffe09000 0 0x1000>;
343	bus-range = <0 255>;	343	bus-range = <0 255>;
344	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000	344	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
345	0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;	345	0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
346	clock-frequency = <33333333>;	346	clock-frequency = <33333333>;
347	interrupt-parent = <&mpic>;	347	interrupt-parent = <&mpic>;
348	interrupts = <25 2>;	348	interrupts = <25 2>;


diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts index e95a51285328..7a31d46c01b0 100644 --- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +++ b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
@@ -7,7 +7,7 @@
7	*	7	*
8	* Please note to add "-b 1" for core1's dts compiling.	8	* Please note to add "-b 1" for core1's dts compiling.
9	*	9	*
10	* Copyright 2009 Freescale Semiconductor Inc.	10	* Copyright 2009-2011 Freescale Semiconductor Inc.
11	*	11	*
12	* This program is free software; you can redistribute it and/or modify it	12	* This program is free software; you can redistribute it and/or modify it
13	* under the terms of the GNU General Public License as published by the	13	* under the terms of the GNU General Public License as published by the
@@ -162,8 +162,8 @@
162	#address-cells = <3>;	162	#address-cells = <3>;
163	reg = <0 0xffe0a000 0 0x1000>;	163	reg = <0 0xffe0a000 0 0x1000>;
164	bus-range = <0 255>;	164	bus-range = <0 255>;
165	ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000	165	ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
166	0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;	166	0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
167	clock-frequency = <33333333>;	167	clock-frequency = <33333333>;
168	interrupt-parent = <&mpic>;	168	interrupt-parent = <&mpic>;
169	interrupts = <26 2>;	169	interrupts = <26 2>;
@@ -172,8 +172,8 @@
172	#size-cells = <2>;	172	#size-cells = <2>;
173	#address-cells = <3>;	173	#address-cells = <3>;
174	device_type = "pci";	174	device_type = "pci";
175	ranges = <0x2000000 0x0 0xc0000000	175	ranges = <0x2000000 0x0 0x80000000
176	0x2000000 0x0 0xc0000000	176	0x2000000 0x0 0x80000000
177	0x0 0x20000000	177	0x0 0x20000000
178		178
179	0x1000000 0x0 0x0	179	0x1000000 0x0 0x0